| 2000 | A Stream Processor Architecture Based on the Configurable CEPRA-S. | Rolf Hoffmann, Bernd Ulmann, Klaus-Peter Vlkmann, Stefan Waldschmidt |
| 2000 | On Applying Software Development Best Practice to FPFAs in Safety Critical Systems. | A. Hilton, J. Hall |
| 2000 | An FPFA Based Scheduling Coprocessor for Dynamic Priority Scheduling in Hard-Time Systems. | Jens Hildebrandt, Dirk Timmermann |
| 2000 | Mapping of DSP Algorithms on Field Programmable Function Arrays. | Paul M. Heysters, Jaap Smit, Gerard J. M. Smit, Paul J. M. Havinga |
| 2000 | An Innovative Approach to Couple EDA Tools with Reconfigurable Hardware. | Uwe Hatnik, Jrgen Haufe, Peter Schwarz |
| 2000 | Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures. | Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger |
| 2000 | A Comparison of FPGA Implementations of Bit-Level and Word-Level Matrix Multipliers. | Radhika S. Grover, Weijia Shang, Qiang Li |
| 2000 | Tightly Integrated Design Space Exploration with Spatial and Temporal Partitioning in SPARCS. | Sriram Govindarajan, Ranga Vemuri |
| 2000 | Design and Implementation of an XC6216 FPGA Model in Verilog. | Alexander Glasmacher, Kai Woska |
| 2000 | The Role of the Embedded Memories in the Implementation of Artificial Neural Networks. | Rafael Gadea Girons, Vicente Herrero-Bosch, Angel Sebasti, Antonio Mochol Salcedo |
| 2000 | Static and Dynamic Reconfigurable Designs for a 2D Shape-Adaptive DCT. | Jrn Gause, Peter Y. K. Cheung, Wayne Luk |
| 2000 | Internet Connected FPL. | Hamish Fallside, Michael John Sebastian Smith |
| 2000 | Placement of Linear Arrays. | Erwan Fabiani, Dominique Lavenier |
| 2000 | High-Level Area and Performance Estimation of Hardware Building Blocks on FPGAs. | Rolf Enzler, Tobias Jeger, Didier Cottet, Gerhard Trster |
| 2000 | Performance Penalty for Fault Tolerance in Roving STARs. | John Marty Emmert, Charles E. Stroud, Jason A. Cheatham, Andrew M. Taylor, Pankaj Kataria, Miron Abramovici |
| 2000 | Task Rearrangement on Partially Reconfigurable FPGAs with Restricted Buffer. | Hossam A. ElGindy, Martin Middendorf, Hartmut Schmeck, Bernd Schmidt |
| 2000 | Optimization of Run-Time Reconfigurable Embedded Systems. | Michael Eisenring, Marco Platzner |
| 2000 | The Implementation of Synchronous Dataflow Graphs Using Reconfigurable Hardware. | Martyn Edwards, Peter Green |
| 2000 | Generating Addresses for Multi-dimensional Array Access in FPGA On-chip Memory. | Andreas C. Dring, Gunther Lustig |
| 2000 | A Dynamically Reconfigurable FPGA-Based Content Addressable Memory for Internet Protocol Characterization. | Johan Ditmar, Kjell Torkelsson, Axel Jantsch |
| 2000 | Behavioural Language Compilation with Virtual Hardware Management. | Oliver Diessel, George J. Milne |
| 2000 | Combining Serialisation and Reconfiguration for FPGA Designs. | Arran Derbyshire, Wayne Luk |
| 2000 | Multiplexer Based Reconfiguration for Virtex Multipliers. | Tim Courtney, Richard H. Turner, Roger F. Woods |
| 2000 | Multiple-Wordlength Resource Binding. | George A. Constantinides, Peter Y. K. Cheung, Wayne Luk |
| 2000 | FPGA Implementation of a Prototype WDM On-Line Scheduler. | Winnie W. Cheng, Steven J. E. Wilton, Babak Hamidzadeh |