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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2019Pyramid: Machine Learning Framework to Estimate the Optimal Timing and Resource Usage of a High-Level Synthesis Design.Hosein Mohammadi Makrani, Farnoud Farahmand, Hossein Sayadi, Sara Bondi, Sai Manoj Pudukotai Dinakarrao, Houman Homayoun, Setareh Rafatirad
2019FPGA Accelerated Deep Learning Radio Modulation Classification Using MATLAB System Objects & PYNQ.Andrew Maclellan, Lewis D. McLaughlin, Louise Crockett, Robert W. Stewart
2019Specializing FGPU for Persistent Deep Learning.Rui Ma, Derek Chiou, Jia-Ching Hsu, Tian Tan, Eriko Nurvitadhi, David Sheffield, Rob Pelt, Martin Langhammer, Jaewoong Sim, Aravind Dasu
2019Accelerating Position-Aware Top-k ListNet for Ranking Under Custom Precision Regimes.Qiang Li, Erwei Wang, Shane T. Fleming, David B. Thomas, Peter Y. K. Cheung
2019Towards an Efficient Accelerator for DNN-Based Remote Sensing Image Segmentation on FPGAs.Shuanglong Liu, Wayne Luk
2019Timing-Aware Routing in the RapidWright Framework.Leo Liu, Nachiket Kapre
2019InS-DLA: An In-SSD Deep Learning Accelerator for Near-Data Processing.Shengwen Liang, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li
2019Extracting INT8 Multipliers from INT18 Multipliers.Martin Langhammer, Bogdan Pasca, Gregg Baeckler, Sergey Gribok
2019An FPGA-Based Architecture to Simulate Cellular Automata with Large Neighborhoods in Real Time.Nikolaos Kyparissas, Apostolos Dollas
2019Storing Parquet Tile by Tile: Application-Aware Storage with Deduplication.Lucas Kuhring, Zsolt Istvn
2019Dataflow Acceleration of Smith-Waterman with Traceback for High Throughput Next Generation Sequencing.Konstantina Koliogeorgi, Nils Voss, Sotiria Fytraki, Sotirios Xydis, Georgi Gaydadjiev, Dimitrios Soudris
2019Demonstration of Low Power Stream Processing Using a Variable Pipelined CGRA.Takuya Kojima, Naoki Ando, Yusuke Matsushita, Hideharu Amano
2019Accelerating Bayesian Inference on Structured Graphs Using Parallel Gibbs Sampling.Glenn G. Ko, Yuji Chai, Rob A. Rutenbar, David Brooks, Gu-Yeon Wei
2019Efficient Pattern Recognition Algorithm Including a Fast Retina Keypoint FPGA Implementation.Lester Kalms, Maximilian Hajduk, Diana Ghringer
2019Real-Time Multi-Pedestrian Detection in Surveillance Camera using FPGA.Akira Jinguji, Youki Sada, Hiroki Nakahara
2019Neural Network Overlay Using FPGA DSP Blocks.Lenos Ioannou, Suhaib A. Fahmy
2019Network Intrusion Detection Using Neural Networks on FPGA SoCs.Lenos Ioannou, Suhaib A. Fahmy
2019Demonstration of Flow-in-Cloud: A Multi-FPGA System.Kazuei Hironaka, Kensuke Iizuka, Akram Ben Ahmed, M. M. Imdad Ullah, Yugo Yamauchi, Yuxi Sun, Miho Yamakura, Aoi Hiruma, Hideharu Amano
2019Preallocating Resources for Distributed Memory Based FPGA Debug.Robert Hale, Brad L. Hutchings
2019TensorFlow to Cloud FPGAs: Tradeoffs for Accelerating Deep Neural Networks.Stefan Hadjis, Kunle Olukotun
2019Measuring Long Wire Leakage with Ring Oscillators in Cloud FPGAs.Ilias Giechaskiel, Kasper Bonne Rasmussen, Jakub Szefer
2019A Dynamic Memory Allocation Library for High-Level Synthesis.Nicholas V. Giamblanco, Jason Helge Anderson
2019Software/Hardware Codesign of the Post Quantum Cryptography Algorithm NTRUEncrypt Using High-Level Synthesis and Register-Transfer Level Design Methodologies.Farnoud Farahmand, Duc Tri Nguyen, Viet Ba Dang, Ahmed Ferozpuri, Kris Gaj
2019FPGA Accelerated FPGA Placement.Shounak Dhar, Love Singhal, Mahesh A. Iyer, David Z. Pan
2019A Distributed Model of Computation for Reconfigurable Devices Based on a Streaming Architecture.Paolo Cretaro
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