| 2018 | Efficient Multiple Constant Multiplication Using DSP Blocks in FPGA. | Ahmet Can Mert, Hasan Azgin, Ercan Kalali, Ilker Hamzaoglu |
| 2018 | Machine-Learning Based Congestion Estimation for Modern FPGAs. | Dani Maarouf, Abeer Alhyari, Ziad Abuowaimer, Timothy Martin, Andrew David Gunter, Gary Grwal, Shawki Areibi, Anthony Vannelli |
| 2018 | RNA: An Accurate Residual Network Accelerator for Quantized and Reconstructed Deep Neural Networks. | Cheng Luo, Yuhua Wang, Wei Cao, Philip H. W. Leong, Lingli Wang |
| 2018 | Multi-fidelity Optimization for High-Level Synthesis Directives. | Charles Lo, Paul Chow |
| 2018 | Resource Reduction of BFGS Quasi-Newton Implementation on FPGA Using Fixed-Point Matrix Updating. | Jia Liu, Qiang Liu |
| 2018 | An Application-Specific Field-Programmable Tree Ensemble Architecture. | Jan Khn, Yiannos Manoli |
| 2018 | Cascade^CNN: Pushing the Performance Limits of Quantisation in Convolutional Neural Networks. | Alexandros Kouris, Stylianos I. Venieris, Christos-Savvas Bouganis |
| 2018 | A Configuration Data Multicasting Method for Coarse-Grained Reconfigurable Architectures. | Takuya Kojima, Hideharu Amano |
| 2018 | DESSERT: Debugging RTL Effectively with State Snapshotting for Error Replays across Trillions of Cycles. | Donggyu Kim, Christopher Celio, Sagar Karandikar, David Biancolin, Jonathan Bachrach, Krste Asanovic |
| 2018 | Cycle-Accurate and Cycle-Reproducible Debugging of Embedded Designs Using Artificial Intelligence. | Habib ul Hasan Khan, Diana Ghringer |
| 2018 | Accelerated Wire-Speed Packet Capture at 200 Gbps. | Lukas Kekely, Martin Spinler, Stepan Friedl, Jiri Sikora, Jan Korenek |
| 2018 | An FPGA Overlay Architecture Supporting Rapid Implementation of Functional Changes during On-Chip Debug. | Al-Shahna Jamal, Jeffrey Goeders, Steven J. E. Wilton |
| 2018 | Providing Multi-tenant Services with FPGAs: Case Study on a Key-Value Store. | Zsolt Istvn, Gustavo Alonso, Ankit Singla |
| 2018 | ClosNets: Batchless DNN Training with On-Chip a Priori Sparse Neural Topologies. | Mihailo Isakov, Alan Ehret, Michel A. Kinsy |
| 2018 | A Flexible K-Means Operator for Hybrid Databases. | Zhenhao He, David Sidler, Zsolt Istvn, Gustavo Alonso |
| 2018 | Enabling Low Impact, Rapid Debug for Highly Utilized FPGA Designs. | Robert Hale, Brad L. Hutchings |
| 2018 | FBNA: A Fully Binarized Neural Network Accelerator. | Peng Guo, Hong Ma, Ruizhi Chen, Pin Li, Shaolin Xie, Donglin Wang |
| 2018 | A Framework for Acceleration of CNN Training on Deeply-Pipelined FPGA Clusters with Work and Weight Load Balancing. | Tong Geng, Tianqi Wang, Ahmed Sanaullah, Chen Yang, Rushi Patel, Martin C. Herbordt |
| 2018 | A SAT-based Timing Driven Place and Route Flow for Critical Soft IP. | Henri Fraisse, Dinesh Gaitonde |
| 2018 | An Efficient Exact Fused Dot Product Processor in FPGA. | Lus Fiolhais, Horcio C. Neto |
| 2018 | Customizing Low-Precision Deep Neural Networks for FPGAs. | Julian Faraone, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, Philip H. W. Leong, David Boland |
| 2018 | Reconfigurable Acceleration of 3D-CNNs for Human Action Recognition with Block Floating-Point Representation. | Hongxiang Fan, Ho-Cheung Ng, Shuanglong Liu, Zhiqiang Que, Xinyu Niu, Wayne Luk |
| 2018 | Performance-Driven System Generation for Distributed Vertex-Centric Graph Processing on Multi-FPGA Systems. | Nina Engelhardt, C.-H. Dominic Hung, Hayden Kwok-Hay So |
| 2018 | Lynq: A Lightweight Software Layer for Rapid SoC FPGA Prototyping. | Jonathan Dchelotte, Russell Tessier, Dominique Dallet, Jrmie Crenne |
| 2018 | CRRS: Custom Regression and Regularisation Solver for Large-Scale Linear Systems. | Andreea-Ingrid Cross, Liucheng Guo, Wayne Luk, Mark Salmon |