| 2013 | An event-based middleware for the remote management of runtime hardware reconfiguration. | Franois Philipp, Manfred Glesner |
| 2013 | On measurement of parameters of programmable microelectronic nanostructures under accelerating extreme conditions (Xilinx 28nm XC7Z020 Zynq FPGA). | Petr Pfeifer, Zdenek Plva |
| 2013 | Shadow And-Inverter Cones. | Hadi Parandeh-Afshar, Grace Zgheib, David Novo, Madhura Purnaprajna, Paolo Ienne |
| 2013 | Fast, FPGA-based Rainbow Table creation for attacking encrypted mobile communications. | Panagiotis Papantonakis, Dionisios N. Pnevmatikatos, Ioannis Papaefstathiou, Charalampos Manifavas |
| 2013 | A high performance deblocking filter hardware for High Efficiency Video Coding. | Erdem Ozcan, Yusuf Adibelli, Ilker Hamzaoglu |
| 2013 | TILT: A multithreaded VLIW soft processor family. | Kalin Ovtcharov, Ilian Tili, J. Gregory Steffan |
| 2013 | Identifying sequences of optimizations for HW/SW compilation. | Ricardo Nobre |
| 2013 | A scalable design approach for stencil computation on reconfigurable clusters. | Xinyu Niu, Jos Gabriel F. Coutinho, Wayne Luk |
| 2013 | A dataflow-inspired CGRA for streaming applications. | Anja Niedermeier, Jan Kuper, Gerard J. M. Smit |
| 2013 | Accelerated FPGA repair through shifted scrubbing. | Gabriel L. Nazar, Leonardo P. Santos, Luigi Carro |
| 2013 | Managing the FPGA memory wall: Custom computing or vector processing? | Matthew Naylor, Paul James Fox, A. Theodore Markettos, Simon W. Moore |
| 2013 | A spiking neural network on a portable FPGA tablet. | Matthew Naylor, Paul James Fox, A. Theodore Markettos, Simon W. Moore |
| 2013 | A packet classifier using LUT cascades based on EVMDDS (k). | Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura |
| 2013 | From Quartus to VPR: Converting HDL to BLIF with the Titan flow. | Kevin E. Murray, Scott Whitty, Suya Liu, Jason Luu, Vaughn Betz |
| 2013 | Titan: Enabling large and complex benchmarks in academic CAD. | Kevin E. Murray, Scott Whitty, Suya Liu, Jason Luu, Vaughn Betz |
| 2013 | Distributed embedded systems design using Petri nets. | Filipe Moutinho, Lus Gomes |
| 2013 | Area/performance evaluation of digit-digit GF(2 | Miguel Morales-Sandoval, Arturo Daz-Prez |
| 2013 | A resource-efficient probabilistic fault simulator. | David May, Walter Stechele |
| 2013 | Memory efficient IP lookup in 100 GBPS networks. | Jir Matousek, Martin Skacan, Jan Korenek |
| 2013 | Energy efficient architecture for matrix multiplication on FPGAs. | Kiran Kumar Matam, Hoang Le, Viktor K. Prasanna |
| 2013 | Design Space Exploration based on multiobjective genetic algorithms and clustering-based high-level estimation. | Luiz G. A. Martins, Eduardo Marques |
| 2013 | Run-time optimization of a dynamically reconfigurable embedded system through performance prediction. | Giovanni Mariani, Vlad Mihai Sima, Gianluca Palermo, Vittorio Zaccaria, Giacomo Marchiori, Cristina Silvano, Koen Bertels |
| 2013 | Radiation mitigation efficiency of scrubbing on the FPGA based CBM-TOF read-out controller. | Sebastian Manz, Jano Gebelein, Andrei Oancea, Heiko Engel, Udo Kebschull |
| 2013 | In pursuit of instant gratification for FPGA design. | Andrew Love, Wenwei Zha, Peter Athanas |
| 2013 | Rapid modular assembly of Xilinx FPGA designs. | Andrew Love, Peter Athanas |