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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2013Criticality-based routing for FPGAS with reverse body bias switch box architectures.Wei Ting Loke, Wenfeng Zhao, Yajun Ha
2013SMI: Slack Measurement Insertion for online timing monitoring in FPGAs.Joshua M. Levine, Edward A. Stott, George A. Constantinides, Peter Y. K. Cheung
2013Aging monitoring with local sensors in FPGA-based designs.Carlos Leong, Jorge Semio, Isabel C. Teixeira, Marcelino B. Santos, Joo Paulo Teixeira, Mara Dolores Valds, Judit Freijedo, Juan J. Rodrguez-Andina, Fabian Vargas
2013Scalable and high throughput biosensing platform.Jos M. Leito, Jos A. Germano, Nuno Roma, Ricardo Chaves, Pedro Toms
2013Weasel: A platform-independent streaming-optimized SATA controller.Patrick Lehmann, Thomas Frank, Oliver Knodel, Steffen Khler, Thomas B. Preuer, Rainer G. Spallek
2013A hardware accelerated approach for imaging flow cytometry.Dajung Lee, Pingfan Meng, Matthew Jacobsen, Henry Tse, Dino Di Carlo, Ryan Kastner
2013Impact of hard macro size on FPGA clock rate and place/route time.Christopher Lavin, Brent E. Nelson, Brad L. Hutchings
2013Dynamic branch prediction for high-level synthesis.Vianney Lapotre, Philippe Coussy, Cyrille Chavet, Hugues Wouafo, Robin Danilo
2013Efficient floating-point polynomial evaluation on FPGAS.Martin Langhammer, Bogdan Pasca
2013Yet Another Many-Objective Clustering (YAMO-Pack) for FPGA CAD.Meng Yang, Jinmei Lai, Jiarong Tong
2013Multiple constant multiplication with ternary adders.Martin Kumm, Martin Hardieck, Jens Willkomm, Peter Zipf, Uwe Meyer-Baese
2013Demonstration of a heterogeneous multi-core processor with 3-D inductive coupling links.Yusuke Koizumi, Noriyuki Miura, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura
2013An efficient FPGA overlay for portable custom instruction set extensions.Dirk Koch, Christian Beckhoff, Guy G. F. Lemieux
2013Integration of a multi-FPGA system in a common cluster environment.Oliver Knodel, Rainer G. Spallek
2013An asynchronous bus bridge for partitioned multi-soc architectures on FPGAs.Daniel Kliem, Sven-Ole Voigt
2013Generating infrastructure for FPGA-accelerated applications.Myron King, Asif Khan, Abhinav Agarwal, Oriol Arcas, Arvind
2013The HercuLeS high-level synthesis environment.Nikolaos Kavvadias, Kostas Masselos
2013Image recognition operation on a dynamically reconfigurable vison architecture.Yuki Kamikubo, Minoru Watanabe, Shoji Kawahito
2013Analysis of matrix multiplication on high density Virtex-7 FPGA.Wilson Jos, Ana Rita Silva, Horcio C. Neto, Mrio P. Vstias
2013Performance evaluation of Sparse Matrix-Matrix Multiplication.Shweta Jain-Mendon, Ron Sass
2013RIFFA 2.0: A reusable integration framework for FPGA accelerators.Matthew Jacobsen, Ryan Kastner
2013A flexible hash table design for 10GBPS key-value stores on FPGAS.Zsolt Istvn, Gustavo Alonso, Michaela Blott, Kees A. Vissers
2013Charge recycling for power reduction in FPGA interconnect.Safeen Huda, Jason Helge Anderson, Hirotaka Tamura
2013A directional coarse-grained power gated FPGA switch box and power gating aware routing algorithm.Chin Hau Hoo, Yajun Ha, Akash Kumar
2013Efficient implementation of Virtual Coarse Grained Reconfigurable Arrays on FPGAS.Karel Heyse, Tom Davidson, Elias Vansteenkiste, Karel Bruneel, Dirk Stroobandt
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