| 2008 | Post-silicon timing characterization by compressed sensing. | Farinaz Koushanfar, Petros Boufounos, Davood Shamsi |
| 2008 | Impulse sensitivity function analysis of periodic circuits. | Jaeha Kim, Brian S. Leibowitz, Metha Jeeradit |
| 2008 | A framework for predictive dynamic temperature management of microprocessor systems. | Omer Khan, Sandip Kundu |
| 2008 | A succinct memory model for automated design debugging. | Brian Keng, Hratch Mangassarian, Andreas G. Veneris |
| 2008 | Silicon feedback to improve frequency of high-performance microprocessors: an overview. | Chandramouli V. Kashyap, Pouria Bastani, Kip Killpack, Chirayu S. Amin |
| 2008 | Synthesis from multi-cycle atomic actions as a solution to the timing closure problem. | Michal Karczmarek, Arvind |
| 2008 | Correct-by-construction microarchitectural pipelining. | Timothy Kam, Michael Kishinevsky, Jordi Cortadella, Marc Galceran Oms |
| 2008 | Layout decomposition for double patterning lithography. | Andrew B. Kahng, Chul-Hong Park, Xu Xu, Hailong Yao |
| 2008 | CAD for displays! | Mary Lou Jepsen |
| 2008 | Temperature aware task sequencing and voltage scaling. | Ramkumar Jayaseelan, Tulika Mitra |
| 2008 | A voltage-frequency island aware energy optimization framework for networks-on-chip. | Wooyoung Jang, Duo Ding, David Z. Pan |
| 2008 | On efficient Monte Carlo-based statistical static timing analysis of digital circuits. | Javid Jaffari, Mohab Anis |
| 2008 | A polynomial time approximation scheme for timing constrained minimum cost layer assignment. | Shiyan Hu, Zhuo Li, Charles J. Alpert |
| 2008 | Robust FPGA resynthesis based on fault-tolerant Boolean matching. | Yu Hu, Zhe Feng, Lei He, Rupak Majumdar |
| 2008 | Multi-layer global routing considering via and wire capacities. | Chin-Hsiung Hsu, Huang-Yu Chen, Yao-Wen Chang |
| 2008 | Efficient block-based parameterized timing analysis covering all potentially critical paths. | Khaled R. Heloue, Sari Onaissi, Farid N. Najm |
| 2008 | A novel fixed-outline floorplanner with zero deadspace for hierarchical design. | Ou He, Sheqin Dong, Jinian Bian, Satoshi Goto, Chung-Kuan Cheng |
| 2008 | Model reduction via projection onto nonlinear manifolds, with applications to analog circuits and biochemical systems. | Chenjie Gu, Jaijeet S. Roychowdhury |
| 2008 | Context-sensitive static transistor-level IR analysis. | Weiqing Guo, Yu Zhong, Tom Burd |
| 2008 | Smoothed form of nonlinear phase macromodel for oscillators. | Mark M. Gourary, Sergey G. Rusakov, Sergey L. Ulyanov, Michael M. Zharov, Brian J. Mulvaney, Kiran K. Gullapalli |
| 2008 | Performance estimation and slack matching for pipelined asynchronous architectures with choice. | Gennette Gill, Vishal Gupta, Montek Singh |
| 2008 | Minimizing the energy cost of throughput in a linear pipeline by opportunistic time borrowing. | Mohammad Ghasemazar, Massoud Pedram |
| 2008 | Using test data to improve IC quality and yield. | Anne Gattiker |
| 2008 | Importance sampled circuit learning ensembles for robust analog IC design. | Peng Gao, Trent McConaghy, Georges G. E. Gielen |
| 2008 | Module locking in biochemical synthesis. | Brian Fett, Marc D. Riedel |