| 2008 | Thermal-aware floorplanning for task migration enabled active sub-threshold leakage reduction. | Hushrav Mogal, Kia Bazargan |
| 2008 | Placement based multiplier rewiring for cell-based designs. | Fan Mo, Robert K. Brayton |
| 2008 | Effective IR-drop reduction in at-speed scan testing using Distribution-Controlling X-Identification. | Kohei Miyase, Kenji Noda, Hideaki Ito, Kazumi Hatayama, Takashi Aikyo, Yuta Yamato, Hiroshi Furukawa, Xiaoqing Wen, Seiji Kajihara |
| 2008 | Reliable system design: models, metrics and design techniques. | Subhasish Mitra, Ravishankar K. Iyer, Kishor S. Trivedi, James W. Tschanz |
| 2008 | Process variability-aware transient fault modeling and analysis. | Natasa Miskov-Zivanov, Kai-Chiang Wu, Diana Marculescu |
| 2008 | Scalable and scalably-verifiable sequential synthesis. | Alan Mishchenko, Michael L. Case, Robert K. Brayton, Stephen Jang |
| 2008 | Boolean factoring and decomposition of logic networks. | Alan Mishchenko, Robert K. Brayton, Satrajit Chatterjee |
| 2008 | Automated extraction of expert knowledge in analog topology selection and sizing. | Trent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert |
| 2008 | Network flow-based power optimization under timing constraints in MSV-driven floorplanning. | Qiang Ma, Evangeline F. Y. Young |
| 2008 | Thermal-aware reliability analysis for platform FPGAs. | Prasanth Mangalagiri, Sungmin Bae, Krishnan Ramakrishnan, Yuan Xie, Vijaykrishnan Narayanan |
| 2008 | Lightweight secure PUFs. | Mehrdad Majzoobi, Farinaz Koushanfar, Miodrag Potkonjak |
| 2008 | Exact basic geometric operations on arbitrary angle polygons using only fixed size integer coordinates. | Alexey Lvov, Ulrich Finkler |
| 2008 | Pyramids: an efficient computational geometry-based approach for timing-driven placement. | Tao Luo, David A. Papa, Zhuo Li, Chin Ngai Sze, Charles J. Alpert, David Z. Pan |
| 2008 | A low-overhead fault tolerance scheme for TSV-based 3D network on chip links. | Igor Loi, Subhasish Mitra, Thomas H. Lee, Shinobu Fujita, Luca Benini |
| 2008 | Obstacle-avoiding rectilinear Steiner tree construction. | Liang Li, Evangeline F. Y. Young |
| 2008 | Delay-optimal simultaneous technology mapping and placement with applications to timing optimization. | Yifang Liu, Rupesh S. Shelar, Jiang Hu |
| 2008 | Parameterized transient thermal behavioral modeling for chip multiprocessors. | Duo Li, Sheldon X.-D. Tan, Eduardo H. Pacheco, Murli Tirumala |
| 2008 | Incorporating logic exclusivity (LE) constraints in noise analysis using gain guided backtracking method. | Ruiming Li, An-Jui Shey, Michel Laudes |
| 2008 | To SAT or not to SAT: Ashenhurst decomposition in a large scale. | Hsuan-Po Lin, Jie-Hong Roland Jiang, Ruei-Rung Lee |
| 2008 | On capture power-aware test data compression for scan-based testing. | Jia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, Qiang Xu |
| 2008 | Large-scale atomistic approach to random-dopant-induced characteristic variability in nanoscale CMOS digital and high-frequency integrated circuits. | Yiming Li, Chih-Hong Hwang, Ta-Ching Yeh, Tien-Yeh Li |
| 2008 | Pulse width allocation with clock skew scheduling for optimizing pulsed latch-based sequential circuits. | Hyein Lee, Seungwhun Paik, Youngsoo Shin |
| 2008 | Simultaneous control of power/ground current, wakeup time and transistor overhead in power gated circuits. | Yongho Lee, Deog-Kyoon Jeong, Taewhan Kim |
| 2008 | Frequency-aware PPV: a robust phase macromodel for accurate oscillator noise analysis. | Xiaolue Lai |
| 2008 | A novel sequential circuit optimization with clock gating logic. | Yu-Min Kuo, Shih-Hung Weng, Shih-Chieh Chang |