| 2008 | A new method to improve accuracy of leakage current estimation for transistors with non-rectangular gates due to sub-wavelength lithography effects. | Kuen-Yu Tsai, Meng-Fu You, Yi-Chang Lu, Philip C. W. Ng |
| 2008 | Power supply noise aware workload assignment for multi-core systems. | Aida Todri, Malgorzata Marek-Sadowska, Joseph N. Kozhaya |
| 2008 | Verification of arithmetic datapaths using polynomial function models and congruence solving. | Neal Tew, Priyank Kalla, Namrata Shekhar, Sivaram Gopalakrishnan |
| 2008 | Deterministic analog circuit placement using hierarchically bounded enumeration and enhanced shape functions. | Martin Strasser, Michael Eick, Helmut Grb, Ulf Schlichtmann, Frank M. Johannes |
| 2008 | Optimization-based framework for simultaneous circuit-and-system design-space exploration: a high-speed link example. | Ranko Sredojevic, Vladimir Stojanovic |
| 2008 | Constrained aggressor set selection for maximum coupling noise. | Debjit Sinha, Gregory Schaeffer, Soroush Abbaspour, Alex Rubin, Frank Borkam |
| 2008 | Practical, fast Monte Carlo statistical static timing analysis: why and how. | Amith Singhee, Sonia Singhal, Rob A. Rutenbar |
| 2008 | Process variation aware system-level task allocation using stochastic ordering of delay distributions. | Love Singhal, Elaheh Bozorgzadeh |
| 2008 | Texture filter memory: a power-efficient and scalable texture memory architecture for mobile graphics processors. | B. V. N. Silpa, Anjul Patney, Tushar Krishna, Preeti Ranjan Panda, G. S. Visweswaran |
| 2008 | Efficient and accurate eye diagram prediction for high speed signaling. | Rui Shi, Wenjian Yu, Yi Zhu, Chung-Kuan Cheng, Ernest S. Kuh |
| 2008 | Characterization and modeling of graphene field-effect devices. | Kenneth L. Shepard, Inanc Meric, Philip Kim |
| 2008 | Game-theoretic timing analysis. | Sanjit A. Seshia, Alexander Rakhlin |
| 2008 | On the decreasing significance of large standard cells in technology mapping. | Jae-sun Seo, Igor L. Markov, Dennis Sylvester, David T. Blaauw |
| 2008 | On the numbers of variables to represent sparse logic functions. | Tsutomu Sasao |
| 2008 | Clock buffer polarity assignment combined with clock tree generation for power/ground noise minimization. | Yesin Ryu, Taewhan Kim |
| 2008 | Algorithms for simultaneous consideration of multiple physical synthesis transforms for timing closure. | Huan Ren, Shantanu Dutt |
| 2008 | Efficient online computation of core speeds to maximize the throughput of thermally constrained multi-core processors. | Ravishankar Rao, Sarma B. K. Vrudhula |
| 2008 | On the modeling of resistance in graphene nanoribbon (GNR) for future interconnect applications. | Tamer Ragheb, Yehia Massoud |
| 2008 | Power supply signal calibration techniques for improving detection resolution to hardware Trojans. | Reza M. Rad, Xiaoxiao Wang, Mohammad Tehranipoor, Jim Plusquellic |
| 2008 | Architecting parallel programs. | Joel R. Phillips, Kurt Keutzer, Michael Wrinn |
| 2008 | Hybrid CMOS-STTRAM non-volatile FPGA: design challenges and optimization approaches. | Somnath Paul, Saibal Mukhopadhyay, Swarup Bhunia |
| 2008 | Nanolithography and CAD challenges for 32nm/22nm and beyond. | David Z. Pan, Stephen Renwick, Vivek Singh, Judy Huckabay |
| 2008 | Robust reconfigurable filter design using analytic variability quantification techniques. | Arthur Nieuwoudt, Jamil Kawa, Yehia Massoud |
| 2008 | Physical models for electron transport in graphene nanoribbons and their junctions. | Azad Naeemi, James D. Meindl |
| 2008 | Graphene nanoribbon FETs: technology exploration and CAD. | Kartik Mohanram, Jing Guo |