| 2002 | SAT and ATPG: Boolean engines for formal hardware verification. | Armin Biere, Wolfgang Kunz |
| 2002 | SiSMA: a statistical simulator for mismatch analysis of MOS ICs. | Giorgio Biagetti, Simone Orcioni, L. Signoracci, Claudio Turchetti, Paolo Crippa, Michele Alessandrini |
| 2002 | Estimation of signal arrival times in the presence of delay noise. | Sarvesh Bhardwaj, Sarma B. K. Vrudhula, David T. Blaauw |
| 2002 | The A to Z of SoCs. | Reinaldo A. Bergamaschi, John M. Cohn |
| 2002 | Track assignment: a desirable intermediate step between global routing and detailed routing. | Shabbir H. Batterywala, Narendra V. Shenoy, William Nicholls, Hai Zhou |
| 2002 | Efficient solution space exploration based on segment trees in analog placement with symmetry constraints. | Florin Balasa, Sarat C. Maruvada, Karthik Krishnamoorthy |
| 2002 | Extraction and LVS for mixed-domain integrated MEMS layouts. | Bikram Baidya, Tamal Mukherjee |
| 2002 | Free space management for cut-based placement. | Charles J. Alpert, Gi-Joon Nam, Paul Villarrubia |
| 2002 | Generic ILP versus specialized 0-1 ILP: an update. | Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah |
| 2002 | Multi-objective circuit partitioning for cutsize and path-based delay minimization. | Cristinel Ababei, Navaratnasothie Selvakkumaran, Kia Bazargan, George Karypis |
| 2001 | Color Permutation: An Iterative Algorithm for Memory Packing. | Jianwen Zhu, Edward S. Rogers Sr. |
| 2001 | Improving the Robustness of a Surface Integral Formulation for Wideband Impendance Extraction of 3D Structures. | Zhenhai Zhu, Jingfang Huang, Ben Song, Jacob K. White |
| 2001 | Efficient Conflict Driven Learning in Boolean Satisfiability Solver. | Lintao Zhang, Conor F. Madigan, Matthew W. Moskewicz, Sharad Malik |
| 2001 | Solution of Parallel Language Equations for Logic Synthesis. | Nina Yevtushenko, Tiziano Villa, Robert K. Brayton, Alexandre Petrenko, Alberto L. Sangiovanni-Vincentelli |
| 2001 | Congestion Reduction During Placement Based on Integer Programming. | Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh |
| 2001 | Predicting the Performance of Synchronous Discrete Event Simulation Systems. | Jinsheng Xu, Moon-Jung Chung |
| 2001 | An Algorithm for Simultaneous Pin Assignment and Routing. | Hua Xiang, Xiaoping Tang, D. F. Wong |
| 2001 | Algorithm Level Re-Computing - A Register Transfer Level Concurrent Error Detection Technique. | Kaijie Wu, Ramesh Karri |
| 2001 | Area Minimization of Power Distribution Network Using Efficient Nonlinear Programming Techniques. | Xiaohai Wu, Xianlong Hong, Yici Cai, Chung-Kuan Cheng, Jun Gu, Wayne Wei-Ming Dai |
| 2001 | A Probabilistic Constructive Approach to Optimization Problems. | Jennifer L. Wong, Farinaz Koushanfar, Seapahn Meguerdichian, Miodrag Potkonjak |
| 2001 | REDI: An Efficient Fault Oriented Procedure to Identify Redundant Faults in Combinational Logic Circuits. | Chen Wang, Irith Pomeranz, Sudhakar M. Reddy |
| 2001 | Bus Encoding to Prevent Crosstalk Delay. | Bret M. Victor, Kurt Keutzer |
| 2001 | A Search-Based Bump-and-Refit Approach to Incremental Routing for ECO Applications in FPGAs. | Vinay Verma, Shantanu Dutt |
| 2001 | Optimisation Problems for Dynamic Concurrent Task-Based Systems. | Diederik Verkest, Peng Yang, Chun Wong, Paul Marchal |
| 2001 | A Layout-Aware Synthesis Methodology for RF Circuits. | Peter J. Vancorenland, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen |