| 1997 | A power modeling and characterization method for macrocells using structure information. | Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou |
| 1997 | Decomposition of timed decision tables and its use in presynthesis optimizations. | Jian Li, Rajesh K. Gupta |
| 1997 | A behavioral signal path modeling methodology for qualitative insight in and efficient sizing of CMOS opamps. | Francky Leyn, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen |
| 1997 | Verifying correct pipeline implementation for microprocessors. | Jeremy R. Levitt, Kunle Olukotun |
| 1997 | An efficient statistical analysis methodology and its application to high-density DRAMs. | Sang-Hoon Lee, Chang-hoon Choi, Jeong-Taek Kong, Wong-Seong Lee, Jei-Hwan Yoo |
| 1997 | Wavesched: a novel scheduling technique for control-flow intensive behavioral descriptions. | Ganesh Lakshminarayana, Kamal S. Khouri, Niraj K. Jha |
| 1997 | Verifying hardware in its software context. | Robert P. Kurshan, Vladimir Levin, Marius Minea, Doron A. Peled, Hsn Yenign |
| 1997 | Simulation methods for RF integrated circuits. | Kenneth S. Kundert |
| 1997 | Approximate timing analysis of combinational circuits under the XBD0 model. | Yuji Kukimoto, Wilsin Gosti, Alexander Saldanha, Robert K. Brayton |
| 1997 | Accurate power estimation for large sequential circuits. | Joseph N. Kozhaya, Farid N. Najm |
| 1997 | Fault simulation of interconnect opens in digital CMOS circuits. | Haluk Konuk |
| 1997 | Partial scan delay fault testing of asynchronous circuits. | Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Saldanha, Alexander Taubin |
| 1997 | A quantitative approach to functional debugging. | Darko Kirovski, Miodrag Potkonjak |
| 1997 | Application-driven synthesis of core-based systems. | Darko Kirovski, Chunho Lee, Miodrag Potkonjak, William H. Mangione-Smith |
| 1997 | Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems. | Kyosun Kim, Ramesh Karri, Miodrag Potkonjak |
| 1997 | IES3: a fast integral equation solver for efficient 3-dimensional extraction. | Sharad Kapur, David E. Long |
| 1997 | Delay bounded buffered tree construction for timing driven floorplanning. | Maggie Zhiwei Kang, Wayne Wei-Ming Dai, Tom Dillinger, David P. LaPotin |
| 1997 | FastPep: a fast parasitic extraction program for complex three-dimensional geometries. | Mattan Kamon, Nuno Alexandre Marques, Jacob K. White |
| 1997 | Hardware/software partitioning for multi-function systems. | Asawaree Kalavade, P. A. Subrahmanyam |
| 1997 | Maximum independent sets on transitive graphs and their applications in testing and CAD. | Dimitrios Kagaris, Spyros Tragoudas |
| 1997 | Forward model checking techniques oriented to buggy designs. | Hiroaki Iwashita, Tsuneo Nakata |
| 1997 | A predictive system shutdown method for energy saving of event-driven computation. | Chi-Hong Hwang, Allen C.-H. Wu |
| 1997 | Effects of delay models on peak power estimation of VLSI sequential circuits. | Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel |
| 1997 | Power optimization using divide-and-conquer techniques for minimization of the number of operations. | Inki Hong, Miodrag Potkonjak, Ramesh Karri |
| 1997 | Fast identification of untestable delay faults using implications. | Keerthi Heragu, Janak H. Patel, Vishwani D. Agrawal |