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IEEE/ACM International Conference on Computer-Aided Design

ICCAD

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering · Distributed Computing and Systems Software

Papers indexed

5,210

1988–2025

Papers per year

1988311 peak2025

ICCAD papers

5,210 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
1996An algorithm for power estimation in switched-capacitor circuits.Chad Young, Giorgio Casinovi, Jonathan Fowler, Paul Kerstetter
1996A new method to express functional permissibilities for LUT based FPGAs and its applications.Shigeru Yamashita, Hiroshi Sawada, Akira Nagoya
1996Hybrid floorplanning based on partial clustering and module restructuring.Takayuki Yamanouchi, Kazuo Tamakashi, Takashi Kambe
1996An approximate timing analysis method for datapath circuits.Hakan Yalcin, John P. Hayes, Karem A. Sakallah
1996Post global routing crosstalk risk estimation and reduction.Tianxiong Xue, Ernest S. Kuh, Dongsheng Wang
1996Jitter-tolerant clock routing in two-phase synchronous systems.Joe G. Xi, Wayne Wei-Ming Dai
1996A new method towards achieving global optimality in technology mapping.Xiaoqing Wen, Kewal K. Saluja
1996Bit-flipping BIST.Hans-Joachim Wunderlich, Gundolf Kiefer
1996Efficient solution of systems of Boolean equations.Scott Woods, Giorgio Casinovi
1996Multi-level logic optimization for low power using local logic transformations.Qi Wang, Sarma B. K. Vrudhula
1996Clock skew optimization for ground bounce control.Ashok Vittal, Hein Ha, Forrest Brewer, Malgorzata Marek-Sadowska
1996A video driver system designed using a top-down, constraint-driven methodology.Iasson Vassiliou, Henry Chang, Alper Demir, Edoardo Charbon, Paolo Miliozzi, Alberto L. Sangiovanni-Vincentelli
1996Metrology for analog module testing using analog testability bus.Chauchin Su, Yue-Tsang Chen, Shyh-Jye Jou, Yuan-Tzu Ting
1996Delay fault coverage: a realistic metric and an estimation technique for distributed path delay faults.Mukund Sivaraman, Andrzej J. Strojwas
1996The case for retiming with explicit reset circuitry.Vigyan Singhal, Sharad Malik, Robert K. Brayton
1996A coordinate-transformed Arnoldi algorithm for generating guaranteed stable reduced-order models of RLC circuits.Lus Miguel Silveira, Mattan Kamon, Ibrahim M. Elfadel, Jacob White
1996GRASP - a new search algorithm for satisfiability.Joo P. Marques Silva, Karem A. Sakallah
1996Software synthesis through task decomposition by dependency analysis.Youngsoo Shin, Kiyoung Choi
1996Noise in deep submicron digital design.Kenneth L. Shepard, Vinod Narayanan
1996Latch optimization in circuits generated from high-level descriptions.Ellen Sentovich, Horia Toma, Grard Berry
1996Unit delay simulation with the inversion algorithm.William J. Schilp, Peter M. Maurer
1996Simulation-based techniques for dynamic test sequence compaction.Elizabeth M. Rudnick, Janak H. Patel
1996Metrics, techniques and recent developments in mixed-signal testing.Gordon W. Roberts
1996Register-transfer level estimation techniques for switching activity and power consumption.Anand Raghunathan, Sujit Dey, Niraj K. Jha
1996Logic optimization by output phase assignment in dynamic logic synthesis.Ruchir Puri, Andrew Bjorksten, Thomas E. Rosser
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