| 1994 | A symbolic method to reduce power consumption of circuits containing false paths. | R. Iris Bahar, Gary D. Hachtel, Enrico Macii, Fabio Somenzi |
| 1994 | Efficient breadth-first manipulation of binary decision diagrams. | Pranav Ashar, Matthew Cheong |
| 1994 | A new built-in self-test approach for digital-to-analog and analog-to-digital converters. | Karim Arabi, Bozena Kaminska, Janusz Rzeszut |
| 1994 | Reuse of design objects in CAD frameworks. | Joachim Altmeyer, Stefan Ohnsorge, Bernd Schrmann |
| 1994 | A general framework for vertex orderings, with applications to netlist clustering. | Charles J. Alpert, Andrew B. Kahng |
| 1994 | Precomputation-based sequential logic optimization for low power. | Mazhar Alidina, Jos Monteiro, Srinivas Devadas, Abhijit Ghosh, Marios C. Papaefthymiou |
| 1994 | A new efficient approach to statistical delay modeling of CMOS digital combinational circuits. | Syed A. Aftab, M. A. Styblinski |
| 1993 | Switch module design with application to two-dimensional segmentation design. | Kai Zhu, D. F. Wong, Yao-Wen Chang |
| 1993 | Optimal sizing of high-speed clock networks based on distributed RC and lossy transmission line models. | Qing Zhu, Wayne Wei-Ming Dai, Joe G. Xi |
| 1993 | Unifying synchronous/asynchronous state machine synthesis. | Kenneth Y. Yun, David L. Dill |
| 1993 | A net-oriented method for realistic fault analysis. | Hua Xue, Chennian Di, Jochen A. G. Jess |
| 1993 | Parallel timing simulation on a distributed memory multiprocessor. | Chih-Po Wen, Katherine A. Yelick |
| 1993 | The maximum set of permissible behaviors for FSM networks. | Yosinori Watanabe, Robert K. Brayton |
| 1993 | A graph-based simplex algorithm for minimizing the layout size and the delay on timing critical paths. | Lih-Yang Wang, Yen-Tai Lai, Bin-Da Liu, Ting-Chung Chang |
| 1993 | Input don't care sequences in FSM networks. | Huey-Yih Wang, Robert K. Brayton |
| 1993 | A unified approach to simulating electrical and thermal substrate coupling interactions in ICs. | Nishath K. Verghese, Sang-Soo Lee, David J. Allstot |
| 1993 | On-chip test generation for combinational circuits by LFSR modification. | Shambhu J. Upadhyaya, Liang-Chi Chen |
| 1993 | Efficient estimation of dynamic power consumption under a real delay model. | Chi-Ying Tsui, Massoud Pedram, Alvin M. Despain |
| 1993 | Simulating sigma-delta modulators in AWEswit. | Richard J. Trihy, Ronald A. Rohrer |
| 1993 | Execution interval analysis under resource constraints. | Adwin H. Timmer, Jochen A. G. Jess |
| 1993 | Computing the observable equivalence relation of a finite state machine. | Thomas Tamisier |
| 1993 | A new generalized row-based global router. | William Swartz, Carl Sechen |
| 1993 | Routing for symmetric FPGAs and FPICs. | Yachyang Sun, Ting-Chi Wang, Chak-Kuen Wong, C. L. Liu |
| 1993 | Efficient and effective placement for very large circuits. | Wern-Jieh Sun, Carl Sechen |
| 1993 | Maximum projections of don't care conditions in a Boolean network. | Ted Stanion, Carl Sechen |