| 2020 | FPGA-based Low-Batch Training Accelerator for Modern CNNs Featuring High Bandwidth Memory. | Shreyas K. Venkataramanaiah, Han-Sok Suh, Shihui Yin, Eriko Nurvitadhi, Aravind Dasu, Yu Cao, Jae-Sun Seo |
| 2020 | DP-MAP: Towards Resistive Dot-Product Engines with Improved Precision. | Necati Uysal, Baogang Zhang, Sumit Kumar Jha, Rickard Ewetz |
| 2020 | Accurate Operation Delay Prediction for FPGA HLS Using Graph Neural Networks. | Ecenur Ustun, Chenhui Deng, Debjit Pal, Zhijing Li, Zhiru Zhang |
| 2020 | PSION 2: Optimizing Physical Layout of Wavelength-Routed ONoCs for Laser Power Reduction. | Alexandre Truppel, Tsun-Ming Tseng, Ulf Schlichtmann |
| 2020 | Your Agile Open Source HW Stinks (Because It Is Not a System). | Michael Bedford Taylor |
| 2020 | Optimal Layout Synthesis for Quantum Computing. | Bochen Tan, Jason Cong |
| 2020 | Modeling Techniques for Logic Locking. | Joseph Sweeney, Marijn J. H. Heule, Lawrence T. Pileggi |
| 2020 | Counteracting Adversarial Attacks in Autonomous Driving. | Qi Sun, Arjun Ashok Rao, Xufeng Yao, Bei Yu, Shiyan Hu |
| 2020 | A CAD-based methodology to optimize HLS code via the Roofline model. | Marco Siracusa, Marco Rabozzi, Emanuele Del Sozzo, Lorenzo Di Tucci, Samuel Williams, Marco D. Santambrogio |
| 2020 | A Non-Gaussian Adaptive Importance Sampling Method for High-Dimensional and Multi-Failure-Region Yield Analysis. | Xiao Shi, Hao Yan, Chuwen Li, Jianli Chen, Longxing Shi, Lei He |
| 2020 | A Thermal-aware Optimization Framework for ReRAM-based Deep Neural Network Acceleration. | Hyein Shin, Myeonggu Kang, Lee-Sup Kim |
| 2020 | Guiding Template Design for Lamellar DSA with Multiple Patterning and Self-Aligned Via Process. | An-Jie Shih, Shao-Yun Fang, Yi-Yu Liu |
| 2020 | Building OpenLANE: A 130nm OpenROAD-based Tapeout- Proven Flow : Invited Paper. | Mohamed Shalan, Tim Edwards |
| 2020 | EDA for Autonomous Behavior Assurance. | Selma Saidi, Dirk Ziegenbein, Jyotirmoy V. Deshmukh, Rolf Ernst |
| 2020 | Efficient Hardware/Software Co-Design for Post-Quantum Crypto Algorithm SIKE on ARM and RISC-V based Microcontrollers. | Debapriya Basu Roy, Tim Fritzmann, Georg Sigl |
| 2020 | Bridging Academic Open-Source EDA to Real-World Usability. | Austin Rovinski, Tutu Ajayi, Minsoo Kim, Guanru Wang, Mehdi Saligane |
| 2020 | NeuroMAX: A High Throughput, Multi-Threaded, Log-Based Accelerator for Convolutional Neural Networks. | Mahmood Azhar Qureshi, Arslan Munir |
| 2020 | Pin-3D: A Physical Synthesis and Post-Layout Optimization Flow for Heterogeneous Monolithic 3D ICs. | Sai Surya Kiran Pentapati, Kyungwook Chang, Vassilios Gerousis, Rwik Sengupta, Sung Kyu Lim |
| 2020 | DisQ: A Novel Quantum Output State Classification Method on IBM Quantum Computers using OpenPulse. | Tirthak Patel, Devesh Tiwari |
| 2020 | Unlocking Wordline-level Parallelism for Fast Inference on RRAM-based DNN Accelerator. | Yeonhong Park, Seung Yul Lee, Hoon Shin, Jun Heo, Tae Jun Ham, Jae W. Lee |
| 2020 | Automatic-SSD: Full Hardware Automation over New Memory for High Performance and Energy Efficient PCIe Storage Cards. | Gyuyoung Park, Myoungsoo Jung |
| 2020 | Test Generation using Reinforcement Learning for Delay-based Side-Channel Analysis. | Zhixin Pan, Jennifer Sheldon, Prabhat Mishra |
| 2020 | Just Say Zero: Containing Critical Bit-Error Propagation in Deep Neural Networks With Anomalous Feature Suppression. | Elbruz Ozen, Alex Orailoglu |
| 2020 | DRAMA: An Approximate DRAM Architecture for High-performance and Energy-efficient Deep Training System. | Duy Thanh Nguyen, Changhong Min, Nhut-Minh Ho, Ik-Joon Chang |
| 2020 | SynergicLearning: Neural Network-Based Feature Extraction for Highly-Accurate Hyperdimensional Learning. | Mahdi Nazemi, Amirhossein Esmaili, Arash Fayyazi, Massoud Pedram |