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IEEE/ACM International Conference on Computer-Aided Design

ICCAD

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering · Distributed Computing and Systems Software

Papers indexed

5,210

1988–2025

Papers per year

1988311 peak2025

ICCAD papers

5,210 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2010SPIRE: A retiming-based physical-synthesis transformation system.David A. Papa, Smita Krishnaswamy, Igor L. Markov
2010Evaluation of using inductive/capacitive-coupling vertical interconnects in 3D network-on-chip.Jin Ouyang, Jing Xie, Matthew Poremba, Yuan Xie
2010Symbolic performance analysis of elastic systems.Marc Galceran Oms, Jordi Cortadella, Michael Kishinevsky
2010Application specific processor design: Architectures, design methods and tools.Achim Nohl, Frank Schirrmeister, Drew Taussig
2010Testing methods for detecting stuck-open power switches in coarse-grain MTCMOS designs.Szu-Pang Mu, Yi-Ming Wang, Hao-Yu Yang, Mango Chia-Tso Chao, Shi-Hao Chen, Chih-Mou Tseng, Tsung-Ying Tsai
2010Design of analog circuits using organic field-effect transistors.Boris Murmann, Wei Xiong
2010Standards for System Level Design.Laurent Maillet-Contoz
2010Fast and lossless graph division method for layout decomposition using SPQR-tree.Wai-Shing Luk, Huiping Huang
2010Variation-aware layout-driven scheduling for performance yield optimization.Gregory Lucas, Deming Chen
2010Aging analysis at gate and macro cell level.Dominik Lorenz, Martin Barke, Ulf Schlichtmann
2010Clustering-based simultaneous task and voltage scheduling for NoC systems.Yifang Liu, Yu Yang, Jiang Hu
2010Hierarchical memory scheduling for multimedia MPSoCs.Ye-Jyun Lin, Chia-Lin Yang, Tay-Jyi Lin, Jiao-Wei Huang, Naehyuck Chang
2010Fast statistical timing analysis of latch-controlled circuits for arbitrary clock periods.Bing Li, Ning Chen, Ulf Schlichtmann
2010Maximum-information storage system: Concept, implementation and application.Xin Li
2010Simultaneous antenna avoidance and via optimization in layer assignment of multi-layer global routing.Tsung-Hsien Lee, Ting-Chi Wang
2010Cross-layer error resilience for robust systems.Larkhoon Leem, Hyungmin Cho, Hsiao-Heng Lee, Young Moon Kim, Yanjing Li, Subhasish Mitra
2010Low-power clock trees for CPUs.Dong-Jin Lee, Myung-Chul Kim, Igor L. Markov
2010In-place decomposition for robustness in FPGA.Ju-Yueh Lee, Zhe Feng, Lei He
2010Recent research development in flip-chip routing.Hsu-Chieh Lee, Yao-Wen Chang, Po-Wei Lee
2010Boolean matching of function vectors with strengthened learning.Chih-Fan Lai, Jie-Hong R. Jiang, Kuo-Hua Wang
2010Unified theory of real-time task scheduling and dynamic voltage/frequency Scaling on MPSoCs.Hessam Kooti, Eli Bozorgzadeh
2010Manufacturing and characteristics of low-voltage organic thin-film transistors.Hagen Klauk, Ute Zschieschang
2010SimPL: An effective placement algorithm.Myung-Chul Kim, Dong-Jin Lee, Igor L. Markov
2010Sequential importance sampling for low-probability and high-dimensional SRAM yield analysis.Kentaro Katayama, Shiho Hagiwara, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
2010Efficient arithmetic sum-of-product (SOP) based Multiple Constant Multiplication (MCM) for FFT.Vinay Karkala, Joseph Wanstrath, Travis Lacour, Sunil P. Khatri
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