| 2010 | Synthesis of an efficient controlling structure for post-silicon clock skew minimization. | Yu-Chien Kao, Hsuan-Ming Chou, Kun-Ting Tsai, Shih-Chieh Chang |
| 2010 | ESL solutions for low power design. | Sylvian Kaiser, Ilija Materic, Rabih Saade |
| 2010 | Efficient trace-driven metaheuristics for optimization of networks-on-chip configurations. | Andrew B. Kahng, Bill Lin, Kambiz Samadi, Rohit Sunkam Ramanujam |
| 2010 | Design-aware mask inspection. | Abde Ali Kagalwalla, Puneet Gupta, Christopher J. Progler, Steve McDonald |
| 2010 | Analysis and optimization of SRAM robustness for double patterning lithography. | Vivek Joshi, Kanak Agarwal, David T. Blaauw, Dennis Sylvester |
| 2010 | On power and fault-tolerance optimization in FPGA physical synthesis. | Manu Jose, Yu Hu, Rupak Majumdar |
| 2010 | Yield enhancement for 3D-stacked memory by redundancy sharing across dies. | Li Jiang, Rong Ye, Qiang Xu |
| 2010 | A synthesis flow for digital signal processing with biomolecular reactions. | Hua Jiang, Aleksandra P. Kharam, Marc D. Riedel, Keshab K. Parhi |
| 2010 | Fidelity metrics for estimation models. | Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran |
| 2010 | SETS: Stochastic execution time scheduling for multicore systems by joint state space and Monte Carlo. | Nabeel Iqbal, Jrg Henkel |
| 2010 | A network-flow based pin-count aware routing algorithm for broadcast electrode-addressing EWOD chips. | Tsung-Wei Huang, Shih-Yuan Yeh, Tsung-Yi Ho |
| 2010 | Obstacle-avoiding rectilinear Steiner minimum tree construction: An optimal approach. | Tao Huang, Evangeline F. Y. Young |
| 2010 | Characterizing the lifetime reliability of manycore processors with core-level redundancy. | Lin Huang, Qiang Xu |
| 2010 | Template-mask design methodology for double patterning technology. | Chin-Hsiung Hsu, Yao-Wen Chang, Sani R. Nassif |
| 2010 | Unified analytical global placement for large-scale mixed-size circuit designs. | Meng-Kai Hsu, Yao-Wen Chang |
| 2010 | Digital microfluidic biochips: A vision for functional diversity and more than moore. | Tsung-Yi Ho, Jun Zeng, Krishnendu Chakrabarty |
| 2010 | Digitalization of mixed-signal functionality in nanometer technologies. | Stephan Henzler |
| 2010 | An energy and power-aware approach to high-level synthesis of asynchronous systems. | John Hansen, Montek Singh |
| 2010 | Polynomial datapath optimization using constraint solving and formal modelling. | Finn Haedicke, Bijan Alizadeh, Grschwin Fey, Masahiro Fujita, Rolf Drechsler |
| 2010 | Generalized nonlinear timing/phase macromodeling: Theory, numerical methods and applications. | Chenjie Gu, Jaijeet S. Roychowdhury |
| 2010 | Peak current reduction by simultaneous state replication and re-encoding. | Junjun Gu, Gang Qu, Lin Yuan, Qiang Zhou |
| 2010 | Symbolic system level reliability analysis. | Michael Gla, Martin Lukasiewycz, Felix Reimann, Christian Haubelt, Jrgen Teich |
| 2010 | Design automation towards reliable analog integrated circuits. | Georges G. E. Gielen, Elie Maricau, Pieter De Wit |
| 2010 | Design and manufacturing of organic RFID circuits: Coping with intrinsic parameter variations in organic devices by circuit design. | Jan Genoe, Kris Myny, Soeren Steudel, Paul Heremans |
| 2010 | System-level impact of chip-level failure mechanisms and screens. | Anne Gattiker |