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On-Line Testing and Robust System Design

IOLTS

C

CORE rank

CORE rank (raw)

C

Fields of research

Computer Systems Engineering · Software Engineering

Papers indexed

1,346

2000–2026

Papers per year

200069 peak2026

IOLTS papers

1,346 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2020Fast BCH 1-Bit Error Correction Combined with Fast Multi-Bit Error Detection.Christian Schulz-Hanke
2020Reduced-Precision DWC for Mixed-Precision GPUs.Fernando Fernandes dos Santos, Marcelo Brandalero, Pedro Martins Basso, Michael Hbner, Luigi Carro, Paolo Rech
2020Industrial Practices in Low-Power Robust Design.C. P. Ravikumar
2020A Comprehensive End-to-end Solution for a Secure and Dynamic Mixed-signal 1687 System.Michele Portolan, R. Silveira Feitoza, Ghislain Takam Tchendjou, Vincent Reynaud, Kalpana Senthamarai Kannan, Manuel J. Barragn, Emmanuel Simeu, Paolo Maistri, Lorena Anghel, Rgis Leveugle, Salvador Mir
2020Reduced Fault Coverage as a Target for Design Scaffolding Security.Irith Pomeranz, Sandip Kundu
2020Storage Based Built-In Test Pattern Generation Method for Close-to-Functional Broadside Tests.Irith Pomeranz
2020Error Resilient Machine Learning for Safety-Critical Systems: Position Paper.Karthik Pattabiraman, Guanpeng Li, Zitao Chen
2020An ECC-Based Repair Approach with an Offset-Repair CAM for Mitigating the MBUs Affecting Repair CAM.Panagiota Papavramidou, Michael Nicolaidis, Patrick Girard
2020A Secure Scan Controller for Protecting Logic Locking.Quang-Linh Nguyen, Emanuele Valea, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre
2020Defect Characterization of Spintronic-based Neuromorphic Circuits.Christopher Mnch, Mehdi B. Tahoori
2020On-Chip Delay Measurement for Degradation Detection And Its Evaluation under Accelerated Life Test.Yousuke Miyake, Takaaki Kato, Seiji Kajihara, Masao Aso, Haruji Futami, Satoshi Matsunaga, Yukiya Miura
2020Soft Error Tolerance of Power-Supply-Noise Hardened Latches.Yukiya Miura, Yuya Kinoshita
2020Automatic Fault Simulators for Diagnosis of Analog Systems.Tommaso Melis, Emmanuel Simeu, Etienne Auvray
2020Leveraging CMOS Aging for Efficient Microelectronics Design.Antonio Leonel Hernndez Martnez, S. Saqib Khursheed, Daniele Rossi
2020A self-scrubbing scheme for embedded systems in radiation environments.Yufan Lu, Xiaojun Zhai, Sangeet Saha, Shoaib Ehsan, Klaus D. McDonald-Maier
2020Leveraging reuse and endurance by efficient mapping and placement for NVM-based FPGAs.Joo Paulo Cardoso de Lima, Rafael Fo de Moura, Luigi Carro
2020Lightweight Protection of Cryptographic Hardware Accelerators against Differential Fault Analysis.Ana Lasheras, Ramon Canal, Eva Rodrguez, Luca Cassano
2020Machine Learning Clustering Techniques for Selective Mitigation of Critical Design Features.Thomas Lange, Aneesh Balakrishnan, Maximilien Glorieux, Dan Alexandrescu, Luca Sterpone
2020Evaluation on Hardware-Trojan Detection at Gate-Level IP Cores Utilizing Machine Learning Methods.Tatsuki Kurihara, Kento Hasegawa, Nozomu Togawa
2020High-level Modeling of Manufacturing Faults in Deep Neural Network Accelerators.Shamik Kundu, Ahmet Soyyigit, Khaza Anuarul Hoque, Kanad Basu
2020Hardware Security Vulnerability Assessment to Identify the Potential Risks in A Critical Embedded Application.Zahra Kazemi, Mahdi Fazeli, David Hly, Vincent Beroulle
2020Single Phase Clock Based Radiation Tolerant D Flip-flop Circuit.Abhishek Jain, Andrea Veggetti, Dennis Crippa, Antonio Benfante, Simone Gerardin, Marta Bagatin
2020A Test Sensitization State Compaction Method on Controller Augmentation.Yuki Ikegaya, Toshinori Hosokawa, Yuta Ishiyama, Hiroshi Yamazaki
2020A Low Capture Power Oriented X-Identification-Filling Co-Optimization Method.Toshinori Hosokawa, Kenichiro Misawa, Hiroshi Yamazaki, Masayoshi Yoshimura, Masayuki Arai
2020Dependable Deep Learning: Towards Cost-Efficient Resilience of Deep Neural Network Accelerators against Soft Errors and Permanent Faults.Muhammad Abdullah Hanif, Muhammad Shafique
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