| 1992 | Synthesis of application-specific heterogeneous multiprocessor systems. | Shiv Prakash, Alice C. Parker |
| 1992 | Performance Optimization of Pipelined Primary Caches. | Kunle Olukotun, Trevor N. Mudge, Richard B. Brown |
| 1992 | *T: A Multithreaded Massively Parallel Architecture. | Rishiyur S. Nikhil, Gregory M. Papadopoulos, Arvind |
| 1992 | Memory management support for tiled array organization. | Gary Newman |
| 1992 | An Analysis of Loop Latency in Dataflow Execution. | Walid A. Najjar, William Marcus Miller, A. P. Wim Bhm |
| 1992 | Directory-based cache coherency protocol for a ring-connected multiprocessor-array. | Wisam Michael |
| 1992 | Comparison of Sparing Alternatives for Disk Arrays. | Jai Menon, Dick Mattson |
| 1992 | Cache Replacement with Dynamic Exclusion. | Scott McFarling |
| 1992 | A new compiler-directed cache coherence scheme for shared memory multiprocessors with fast and parallel explicit invalidation. | Ahmed Louri, Hongki Sung |
| 1992 | Parallel electro-optical rule-based system for fast execution of expert systems. | Ahmed Louri, Jongwhoa Na |
| 1992 | Towards a Shared-Memory Massively Parallel Multiprocessor. | Daniel Litaize, Abdelaziz Mzoughi, Christine Rochange, Pascal Sainrat |
| 1992 | The DASH Prototype: Implementation and Performance. | Daniel Lenoski, James Laudon, Truman Joe, David Nakahira, Luis Stevens, Anoop Gupta, John L. Hennessy |
| 1992 | Architectural and implementation tradeoffs in the design of multiple-context processors. | James Laudon, Anoop Gupta, Mark Horowitz |
| 1992 | Limits of Control Flow on Parallelism. | Monica S. Lam, Robert P. Wilson |
| 1992 | Enhancing boosting with semantic register in a superscalar processor. | Feipei Lai, Meng-chou Chang |
| 1992 | Memory Latency Effects in Decoupled Architectures With a Single Data Memory Module. | Lizyamma Kurian, Paul T. Hulina, Lee D. Coraor |
| 1992 | Lazy Release Consistency for Software Distributed Shared Memory. | Peter J. Keleher, Alan L. Cox, Willy Zwaenepoel |
| 1992 | Processor Coupling: Integrating Compile Time and Runtime Scheduling for Parallelism. | Stephen W. Keckler, William J. Dally |
| 1992 | Performance improvement for vector pipeline multiprocessor systems using a disordered execution model. | M. Tahar Kechadi, Jean-Luc Dekeyser, Philippe Marquet, Philippe Preux |
| 1992 | The Impact of Communication Locality on Large-Scale Multiprocessor Performance. | Kirk L. Johnson |
| 1992 | Performance Evaluation of a Decoded Instruction Cache for Variable Instruction-Length Computers. | Gideon D. Intrater, Ilan Y. Spillinger |
| 1992 | An Elementary Processor Architecture with Simultaneous Instruction Issuing from Multiple Threads. | Hiroaki Hirata, Kozo Kimura, Satoshi Nagamine, Yoshiyuki Mochizuki, Akio Nishimura, Yoshimori Nakase, Teiji Nishizawa |
| 1992 | Instruction-level Parallelism in Prolog: Analysis and Architectural Support. | Alessandro De Gloria, Paolo Faraboschi |
| 1992 | The Turn Model for Adaptive Routing. | Christopher J. Glass, Lionel M. Ni |
| 1992 | Hiding Memory Latency using Dynamic Scheduling in Shared-Memory Multiprocessors. | Kourosh Gharachorloo, Anoop Gupta, John L. Hennessy |