| 2000 | An empirical study on the effects of test type ordering on overall test efficiency. | Jayashree Saxena, Kenneth M. Butler |
| 2000 | On-line and off-line test of airborne digital systems: a reliability study. | Jacob Savir |
| 2000 | A BIST approach for very deep sub-micron (VDSM) defects. | Yasuo Sato, Toyohito Ikeya, Michinobu Nakao, Takaharu Nagumo |
| 2000 | The path to one-picosecond accuracy. | Luca Sartori, Burnell G. West |
| 2000 | Efficient test mode selection and insertion for RTL-BIST. | Subrata Roy, Gokhan Guner, Kwang-Ting Cheng |
| 2000 | Conversion of small functional test sets of nonscan blocks to scan patterns. | Don E. Ross, Tim Wood, Grady Giles |
| 2000 | Defect screening challenges in the Gigahertz/Nanometer age: keeping up with the tails of defect behaviors. | Mike Rodgers |
| 2000 | Successful implementation of structured testing. | Ronald A. Richmond |
| 2000 | Different experiments in test generation for XILINX FPGAs. | Michel Renovell, Yervant Zorian |
| 2000 | On validating data hold times for flip-flops in sequential circuits. | Sudhakar M. Reddy, Irith Pomeranz, Seiji Kajihara, Atsushi Murakami, Sadami Takeoka, Mitsuyasu Ohta |
| 2000 | : Reducing test application time in high-level test generation. | Srivaths Ravi, Ganesh Lakshminarayana, Niraj K. Jha |
| 2000 | DFT advances in Motorola's Next-Generation 74xx PowerPC | Rajesh Raina, Robert Bailey, Dawit Belete, Vikram Khosa, Robert F. Molyneaux, Javier Prado, Ashutosh Razdan |
| 2000 | Pattern generation tools for the development of memory core test patterns for Rambus devices. | John Privitera, Steven Woo, Craig Soldat |
| 2000 | Optimization trade-offs for vector volume and test power. | Bahram Pouya, Alfred L. Crouch |
| 2000 | Predicting device performance from pass/fail transient signal analysis data. | James F. Plusquellic, Amy Germida, Jonathan Hudson, Ernesto Staroswiecki, Chintan Patel |
| 2000 | Design-for-test methods for stand-alone SRAMs at 1 Gb/s/pin and beyond. | Harold Pilo, Stu Hall, Patrick Hansen, Steve Lamphier, Chris Murphy |
| 2000 | Structural test in a board self test environment. | Ulf Pillkahn |
| 2000 | MUST: multiple-stem analysis for identifying sequentially untestable faults. | Qiang Peng, Miron Abramovici, Jacob Savir |
| 2000 | Doing it in STIL: intelligent conversion from STIL to an ATE format. | Bruce R. Parnas |
| 2000 | System issues in boundary-scan board test. | Kenneth P. Parker |
| 2000 | Path-delay fault diagnosis in non-scan sequential circuits with at-speed test application. | Pankaj Pant, Abhijit Chatterjee |
| 2000 | DECOUPLE: defect current detection in deep submicron I_DDQ. | Yukio Okuda |
| 2000 | Considerations for implementing IEEE 1149.1 on system-on-a-chip integrated circuits. | Steven F. Oakland |
| 2000 | An ILP formulation to optimize test access mechanism in system-on-chip testing. | Mehrdad Nourani, Christos A. Papachristou |
| 2000 | Test method evaluation experiments and data. | Phil Nigh, Anne E. Gattiker |