Yervant Zorian
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
141
Venues
11
Active years
1984–2026
Best venue rank
A*
Where they publish
Papers
141 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | DDECS | On-Chip Sensor with Programmable Delay Logic to Monitor Memory Aging Evolution. | Fabian Vargas, Vache Galstyan, Gurgen Harutyunyan, Yervant Zorian |
| 2025 | ETS | European Test Symposium Teams: an Anniversary Snapshot. | Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilrd Enyedi, Iulia Stefan, Ovidiu Stan, Cosmina Corches, Zebo Peng, Petru Eles, Rolf Drechsler, S. Eggersgl, Grschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, Po-Yao Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, Stefano Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, Patrick Girard, Marcello Traiola, Arnaud Virazel, Fernando Fernandes dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letcia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, Fabian Luis Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, Anurup Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand |
| 2025 | ETS | Analysis and Mitigation of Radiation Effects in SRAM-based Register Files. | Zhe Zhang, Surendra Hemaram, Mahta Mayahinia, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian |
| 2025 | ITC | Leveraging UCIe Interface for Silicon Health & Reliabiilty of Chiplets in a 3D Stack. | Sandeep Kumar Goel, Ankita Patidar, Stanley John, Frank Lee, Min-Jer Wang, Daniel F. J. Yang, Yervant Zorian, Manish Arora, Firooz Massoudi, Shaan Awasthi, Stelios Balalis, Velmurugan Pathervellaichamy, Bharath Shankaranarayanan, Narasimhalu Raju, Gurgen Harutyunyan, Grigor Tshagharyan, Vahagn Hovakimyan, Arman Karagyozyan, Alvina Manucharyan |
| 2024 | IOLTS | On-Chip Sensor to Monitor Aging Evolution in FinFET-Based Memories. | Fabian Vargas, Vache Galstyan, Gurgen Harutyunyan, Yervant Zorian |
| 2024 | ITC | Testing for aging in advanced SRAM: From front end of the line transistors to back end of the line interconnects. | Zhe Zhang, Mahta Mayahinia, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian |
| 2024 | VTS | Addressing the Combined Effect of Transistor and Interconnect Aging in SRAM towards Silicon Lifecycle Management. | Zhe Zhang, Mahta Mayahinia, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian |
| 2023 | ETS | On-chip Electromigration Sensor for Silicon Lifecycle Management of Nanoscale VLSI. | Mahta Mayahinia, Mehdi Baradaran Tahoori, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian |
| 2023 | ITC | Utilizing ECC Analytics to Improve Memory Lifecycle Management. | Costas Argyrides, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian |
| 2023 | ITC | SLM Subsystem for Automotive SoC: Case Study on Path Margin Monitor. | Kranthi Kandula, Ramalingam Kolisetti, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian |
| 2023 | VTS | Overcoming Embedded Memory Test & Repair Challenges in the Gate-All-Around Era. | Artur Ghukasyan, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian |
| 2023 | VTS | Innovation Practices Track: Silicon Lifecycle Management Challenges and Opportunities. | Fei Su, Xiankun Robert Jin, Nilanjan Mukherjee, Yervant Zorian |
| 2022 | ITC | A Novel Protection Technique for Embedded Memories with Optimized PPA. | Costas Argyrides, Vilas Sridharan, Hayk Danoyan, Gurgen Harutyunyan, Yervant Zorian |
| 2022 | VTS | Innovative Practices Track: What's Next for Automotive: Where and How to Improve Field Test and Enhance SoC Safety. | Minqiang Peng, Youfa Wu, Jialiang Li, Alex Yu, Grigor Tshagharyan, Costas Argyrides, Vilas Sridharan, Gurgen Harutyunyan, Yervant Zorian, Nilanjan Mukherjee |
| 2020 | ITC | Test and Diagnosis Solution for Functional Safety. | M. Casarsa, Gurgen Harutyunyan, Yervant Zorian |
| 2019 | ITC | Memory FIT Rate Mitigation Technique for Automotive SoCs. | Gabriele Boschi, Donato Luongo, Duccio Lazzarotti, Hanna Shaheen, Hayk T. Grigoryan, Gurgen Harutyunyan, Samvel K. Shoukourian, Yervant Zorian |
| 2019 | ITC | International Test Conference in Asia (ITC-Asia) - Bridging ITC and Test Community in Asia. | Kuen-Jong Lee, Shi-Yu Huang, Huawei Li, Tomoo Inoue, Yervant Zorian |
| 2019 | ITC | 17th IEEE East-West Design and Test Symposium. | Yervant Zorian, Vladimir Hahanov, Svetlana Chumachenko, Eugenia Litvinova |
| 2019 | VTS | Innovative Practices on In-System Test and Reliability of Memories. | S. Bandyopadhyay, J. Mekkoth, Marc Hutner, Hayk T. Grigoryan, Arun Kumar, Samvel K. Shoukourian, Grigor Tshagharyan, Yervant Zorian, Gabriele Boschi, Duccio Lazzarotti, Donato Luongo, Hanna Shaheen, Gurgen Harutyunyan |
| 2018 | ITC | Advanced ECC-Based FIT Rate Mitigation Technique for Automotive SoCs. | Hayk T. Grigoryan, Samvel K. Shoukourian, Gurgen Harutyunyan, Yervant Zorian, Costas Argyrides |
| 2018 | ITC | Advanced Uniformed Test Approach For Automotive SoCs. | Tal Kogan, Yehonatan Abotbol, Gabriele Boschi, Gurgen Harutyunyan, N. Martirosyan, Yervant Zorian |
| 2018 | ITC | Defect injection, Fault Modeling and Test Algorithm Generation Methodology for STT-MRAM. | Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori, Grigor Tshagharyan, Hayk T. Grigoryan, Gurgen Harutyunyan, Yervant Zorian |
| 2018 | ITC | Modeling and Testing of Aging Faults in FinFET Memories for Automotive Applications. | Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian, Anteneh Gebregiorgis, Mohammad Saber Golanbari, Rajendra Bishnoi, Mehdi Baradaran Tahoori |
| 2018 | VTS | IP session on ISO26262 EDA. | Art Schaldenbrand, Yervant Zorian, Stephen Sunter, Peter Sarson |
| 2017 | IOLTS | An effective functional safety infrastructure for system-on-chips. | Christophe Eychenne, Yervant Zorian |
| 2017 | IOLTS | Advanced ECC solution for automotive SoCs. | Hanna Shaheen, Gabriele Boschi, Gurgen Harutyunyan, Yervant Zorian |
| 2017 | ITC | Advanced functional safety mechanisms for embedded memories and IPs in automotive SoCs. | Tal Kogan, Yehonatan Abotbol, Gabriele Boschi, Gurgen Harutyunyan, I. Kroul, Hanna Shaheen, Yervant Zorian |
| 2017 | ITC | An effective functional safety solution for automotive systems-on-chip. | Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian |
| 2016 | ETS | IoT: Source of test challenges. | Erik Jan Marinissen, Yervant Zorian, Mario Konijnenburg, Chih-Tsun Huang, Ping-Hsuan Hsieh, Peter Cockburn, Jeroen Delvaux, Vladimir Rozic, Bohan Yang, Dave Singele, Ingrid Verbauwhede, Cedric Mayor, Robert Van Rijsinge, Cocoy Reyes |
| 2015 | IOLTS | The future of fault tolerant computing. | Jacob A. Abraham, Ravishankar K. Iyer, Dimitris Gizopoulos, Dan Alexandrescu, Yervant Zorian |
| 2015 | IOLTS | An effective embedded test & diagnosis solution for external memories. | Gurgen Harutunyan, Yervant Zorian |
| 2015 | VTS | Impact of parameter variations on FinFET faults. | Gurgen Harutyunyan, Grigor Tshagharyan, Yervant Zorian |
| 2014 | ITC | Design, test & repair methodology for FinFET-based memories. | Yervant Zorian |
| 2014 | VTS | Fault modeling and test algorithm creation strategy for FinFET-based memories. | Gurgen Harutyunyan, Grigor Tshagharyan, Valery A. Vardanian, Yervant Zorian |
| 2014 | VTS | Special session 12C: Young professionals in test - Town meeting. | Alodeep Sanyal, Yanjing Li, Yervant Zorian |
| 2013 | IOLTS | Integrating embedded test infrastructure in SRAM cores to detect aging. | W. Prates, Letcia Maria Veiras Bolzani, Gurgen Harutyunyan, A. Davtyan, Fabian Vargas, Yervant Zorian |
| 2013 | VTS | An effective solution for building memory BIST infrastructure based on fault periodicity. | Gurgen Harutyunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian |
| 2013 | VTS | Special session 12C: Town-hall meeting "young professionals in test". | Alodeep Sanyal, Yervant Zorian |
| 2012 | DATE | Design for test and reliability in ultimate CMOS. | Michael Nicolaidis, Lorena Anghel, Nacer-Eddine Zergainoh, Yervant Zorian, Tanay Karnik, Keith A. Bowman, James W. Tschanz, Shih-Lien Lu, Carlos Tokunaga, Arijit Raychowdhury, Muhammad M. Khellah, Jaydeep P. Kulkarni, Vivek De, Dimiter Avresky |
| 2011 | IOLTS | Generic BIST architecture for testing of content addressable memories. | Hayk T. Grigoryan, Gurgen Harutunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian |
| 2010 | IOLTS | Test and reliability concerns for 3D-ICs. | Yervant Zorian |
| 2009 | DAC | DFM: don't care or competitive weapon? | Mark Redford, Joseph Sawicki, Prasad Subramaniam, Cliff Hou, Yervant Zorian, Kimon Michaels |
| 2009 | DATE | Panel Session - Vertical integration versus disaggregation. | Yervant Zorian |
| 2009 | ITC | Testing 3D chips containing through-silicon vias. | Erik Jan Marinissen, Yervant Zorian |
| 2008 | VTS | An Efficient March-Based Three-Phase Fault Location and Full Diagnosis Algorithm for Realistic Two-Operation Dynamic Faults in Random Access Memories. | Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian |
| 2007 | DAC | Making Manufacturing Work For You. | Srikanth Venkataraman, Ruchir Puri, Steve Griffith, Ankush Oberai, Robert Madge, Greg Yeric, Walter Ng, Yervant Zorian |
| 2007 | DDECS | A March-based Fault Location Algorithm with Partial and Full Diagnosis for All Simple Static Faults in Random Access Memories. | Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian |
| 2006 | DAC | Tradeoffs and choices for emerging SoCs in high-end applications. | Nic Mokhoff, Yervant Zorian |
| 2006 | DAC | Decision-making for complex SoCs in consumer electronic products. | Ron Wilson, Yervant Zorian |
| 2006 | DDECS | Minimal March-Based Fault Location Algorithm with Partial Diagnosis for all Static Faults in Random Access Memories. | Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian |
| 2006 | ETS | Minimal March Tests for Dynamic Faults in Random Access Memories. | Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian |
| 2006 | VTS | Minimal March Test Algorithm for Detection of Linked Static Faults in Random Access Memories. | Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian |
| 2006 | VTS | Session Abstract. | Yervant Zorian, Bruce C. Kim |
| 2006 | VTS | Session Abstract. | Yervant Zorian, Dennis Wassung |
| 2005 | DAC | How to determine the necessity for emerging solutions. | Nic Mokhoff, Yervant Zorian, Kamalesh N. Ruparel, Hao Nham, Francesco Pessolano, Kee Sup Kim |
| 2005 | DAC | Choosing flows and methodologies for SoC design. | Dennis Wassung, Yervant Zorian, Magdy S. Abadir, Mark Bapst, Colin Harris |
| 2005 | DATE | Challenges in Embedded Memory Design and Test. | Erik Jan Marinissen, Betty Prince, Doris Keitel-Schulz, Yervant Zorian |
| 2005 | DATE | Semiconductor Industry Disaggregation vs Reaggregation: Who Will be the Shark? | Yervant Zorian, Bill Frerichs, Dennis Wassung, Jim Ensel, Guri Stark, Mike Gianfagna, Kamalesh N. Ruparel |
| 2005 | IOLTS | On-Line Testing for Secure Implementations: Design and Validation. | Rgis Leveugle, Yervant Zorian, Luca Breveglieri, Andr K. Nieuwland, Klaus Rothbart, Jean-Pierre Seifert |
| 2005 | IOLTS | Impact of Soft Error Challenge on SoC Design. | Yervant Zorian, Valery A. Vardanian, K. Aleksanyan, K. Amirkhanyan |
| 2005 | ITC | Today's SOC test challenges. | Yervant Zorian |
| 2005 | ITC | IEEE 1500 utilization in SOC design and test. | Yervant Zorian, Avetik Yessayan |
| 2005 | VLSID | Optimizing SoC Manufacturability. | Yervant Zorian |
| 2005 | VTS | Minimal March Tests for Unlinked Static Faults in Random Access Memories. | Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian |
| 2005 | VTS | SRAM Retention Testing: Zero Incremental Time Integration with March Algorithms. | Baosheng Wang, Yuejian Wu, Josh Yang, Andr Ivanov, Yervant Zorian |
| 2004 | ITC | Investment vs. Yield Relationship for Memories in SOC. | Yervant Zorian |
| 2004 | VTS | A Methodology for Design and Evaluation of Redundancy Allocation Algorithms. | Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian |
| 2004 | VTS | Reducing Embedded SRAM Test Time under Redundancy Constraints. | Baosheng Wang, Josh Yang, James Cicalo, Andr Ivanov, Yervant Zorian |
| 2003 | DATE | Low-Cost Software-Based Self-Testing of RISC Processor Cores. | Nektarios Kranitis, George Xenoulis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian |
| 2003 | ITC | Overview of the IEEE P1500 Standard. | Francisco DaSilva, Yervant Zorian, Lee Whetsel, Karim Arabi, Rohit Kapur |
| 2003 | ITC | Application and Analysis of RT-Level Software-Based Self-Testing for Embedded Processor Cores. | Nektarios Kranitis, George Xenoulis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian |
| 2003 | ITC | Yield Threats and Inadequacy of One-time Test. | Yervant Zorian |
| 2003 | VTS | A Test Interface for Built-In Test of Non-Isolated Scanned Cores. | Irith Pomeranz, Sudhakar M. Reddy, Yervant Zorian |
| 2002 | DAC | Embedding infrastructure IP for SOC yield improvement. | Yervant Zorian |
| 2002 | DATE | Effective Software Self-Test Methodology for Processor Cores. | Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian |
| 2002 | DATE | Fault Isolation Using Tests for Non-Isolated Blocks. | Irith Pomeranz, Yervant Zorian |
| 2002 | IOLTS | A March-Based Fault Location Algorithm for Static Random Access Memories. | Valery A. Vardanian, Yervant Zorian |
| 2002 | ITC | Embedded Memory Test and Repair: Infrastructure IP for SOC Yield. | Yervant Zorian |
| 2002 | VTS | Instruction-Based Self-Testing of Processor Cores. | Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian |
| 2001 | DATE | Deterministic software-based self-testing of embedded processor cores. | Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Yervant Zorian |
| 2001 | DATE | Embedded tutorial: TRP: integrating embedded test and ATE. | Yervant Zorian, Paolo Prinetto, Joo Paulo Teixeira, Isabel C. Teixeira, Carlos Eduardo Pereira, Octvio Pscoa Dias, Jorge Semio, Peter Muhmenthaler, W. Radermacher |
| 2001 | ITC | IS-FPGA : a new symmetric FPGA architecture with implicit scan. | Michel Renovell, Penelope Faure, Jean-Michel Portal, Joan Figueras, Yervant Zorian |
| 2001 | VTS | Robust and Low-Cost BIST Architectures for Sequential Fault Testing in Datapath Multipliers. | Mihalis Psarakis, Antonis M. Paschalis, Nektarios Kranitis, Dimitris Gizopoulos, Yervant Zorian |
| 2000 | DAC | System chip test: how will it impact your design? | Yervant Zorian, Erik Jan Marinissen |
| 2000 | DATE | Effective Low Power BIST for Datapaths. | Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian |
| 2000 | DATE | Yield Improvement and Repair Trade-Off for Large Embedded Memories. | Yervant Zorian |
| 2000 | DATE | Tutorial Statement. | Yervant Zorian, Michael Nicolaidis, Peter Muhmenthaler, David Y. Lepejian, Chris W. H. Strolenberg, Kees Veelenturf |
| 2000 | ETS | Analyzing the test generation problem for an application-oriented test of FPGAs. | Michel Renovell, Jean-Michel Portal, Penelope Faure, Joan Figueras, Yervant Zorian |
| 2000 | ICCAD | Test of Future System-on-Chips. | Yervant Zorian, Sujit Dey, Mike Rodgers |
| 2000 | ITC | HD | Alfredo Benso, Silvia Chiusano, Stefano Di Carlo, Paolo Prinetto, Fabio Ricciato, Maurizio Spadari, Yervant Zorian |
| 2000 | ITC | Different experiments in test generation for XILINX FPGAs. | Michel Renovell, Yervant Zorian |
| 2000 | ITC | On using IEEE P1500 SECT for test plug-n-play. | Yervant Zorian, Erik Jan Marinissen, Rohit Kapur |
| 2000 | ITC | Wrapper design for embedded core test. | Yervant Zorian, Erik Jan Marinissen, Maurice Lousberg, Sandeep Kumar Goel |
| 2000 | VTS | Low Power/Energy BIST Scheme for Datapaths. | Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian |
| 1999 | DATE | Scaling Deeper to Submicron: On-Line Testing to the Rescue. | Michael Nicolaidis, Yervant Zorian |
| 1999 | DATE | An Effective BIST Architecture for Fast Multiplier Cores. | Antonis M. Paschalis, Nektarios Kranitis, Mihalis Psarakis, Dimitris Gizopoulos, Yervant Zorian |
| 1999 | DATE | Testing the Configurable Interconnect/Logic Interface of SRAM-Based FPGA's. | Michel Renovell, Jean-Michel Portal, Joan Figueras, Yervant Zorian |
| 1999 | ETS | A high-level EDA environment for the automatic insertion of HD-BIST structures. | Alfredo Benso, Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Yervant Zorian |
| 1999 | ETS | Test configuration minimization for the logic cells of SRAM-based FPGAs: a case study. | Michel Renovell, Jean-Michel Portal, Joan Figueras, Yervant Zorian |
| 1999 | ITC | HD-BIST: a hierarchical framework for BIST scheduling and diagnosis in SOCs. | Alfredo Benso, Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Yervant Zorian |
| 1999 | ITC | Towards a standard for embedded core test: an example. | Yervant Zorian, Erik Jan Marinissen, Rohit Kapur, Tony Taylor, Lee Whetsel |
| 1999 | VTS | Testing of Non-Isolated Embedded Legacy Cores and their Surrounding Logic. | Irith Pomeranz, Yervant Zorian |
| 1999 | VTS | An Effective BIST Architecture for Sequential Fault Testing in Array Multipliers. | Mihalis Psarakis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian |
| 1998 | DAC | System-Chip Test Strategies (Tutorial). | Yervant Zorian |
| 1998 | DATE | Built-In Self-Test with an Alternating Output. | T. Bogue, Michael Gssel, Helmut Jrgensen, Yervant Zorian |
| 1998 | DATE | Novel Technique for Testing FPGAs. | Cecilia Metra, Michel Renovell, Giovanni A. Mojoli, Jean-Michel Portal, Sandro Pastore, Joan Figueras, Yervant Zorian, Davide Salvi, Giacomo R. Sechi |
| 1998 | DATE | RAM-Based FPGA's: A Test Approach for the Configurable Logic. | Michel Renovell, Jean-Michel Portal, Joan Figueras, Yervant Zorian |
| 1998 | FPL | SRAM-Based FPGAs: A Fault Model for the Configurable Logig Modules. | Michel Renovell, Jean-Michel Portal, Joan Figueras, Yervant Zorian |
| 1998 | ICCAD | High-level design validation and test. | Sujit Dey, Jacob A. Abraham, Yervant Zorian |
| 1998 | ICCAD | Synthesis of BIST hardware for performance testing of MCM interconnections. | Rajesh Pendurkar, Abhijit Chatterjee, Yervant Zorian |
| 1998 | ITC | Built in self repair for embedded high density SRAM. | Ilyoung Kim, Yervant Zorian, Goh Komoriya, Hai Pham, Frank P. Higgins, Jim L. Lewandowski |
| 1998 | ITC | A distributed BIST technique for diagnosis of MCM interconnections. | Rajesh Pendurkar, Abhijit Chatterjee, Yervant Zorian |
| 1998 | ITC | SRAM-based FPGA's: testing the LUT/RAM modules. | Michel Renovell, Jean-Michel Portal, Joan Figueras, Yervant Zorian |
| 1998 | ITC | Testing embedded-core based system chips. | Yervant Zorian, Erik Jan Marinissen, Sujit Dey |
| 1998 | VTS | Robustly Testable Array Multipliers under Realistic Sequential Cell Fault Model. | Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian |
| 1997 | DATE | Fault-secure shifter design: results and implementations. | Ricardo de Oliveira Duarte, Michael Nicolaidis, Hakim Bederr, Yervant Zorian |
| 1997 | DATE | On the generation of pseudo-deterministic two-patterns test sequence with LFSRs. | Christian Dufaza, Yervant Zorian |
| 1997 | ITC | An Effective BIST Scheme for Arithmetic Logic Units. | Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian, Mihalis Psarakis |
| 1997 | ITC | Test Requirements for Embedded Core-Based Systems and IEEE P1500. | Yervant Zorian |
| 1997 | VTS | Power Dissipation During Testing: Should We Worry About it? | Vishwani D. Agrawal, Robert C. Aitken, J. Braden, Joan Figueras, S. Kumar, Hans-Joachim Wunderlich, Yervant Zorian |
| 1997 | VTS | Systems On Silicon: Design and Test Challenges. | J. Borel, M. Cecchini, C. Malipeddi, Janusz Rajski, Yervant Zorian |
| 1997 | VTS | Test of RAM-based FPGA: methodology and application to the interconnect. | Michel Renovell, Joan Figueras, Yervant Zorian |
| 1996 | DATE | Relay Propagation Scheme for Testing of MCMs on Large Area Substrates. | Koppolu Sasidhar, Abhijit Chatterjee, Yervant Zorian |
| 1996 | DATE | Designing Self-Testable Multi-Chip Modules. | Yervant Zorian, Hakim Bederr |
| 1996 | ITC | An Effective BIST Scheme for Datapaths. | Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian |
| 1996 | ITC | Optimal Multiple Chain Relay Testing Scheme for MCMs on Large Area Substrates. | Koppolu Sasidhar, Abhijit Chatterjee, Yervant Zorian |
| 1995 | DATE | Functional test for shifting-type FIFOs. | Ad J. van de Goor, Ivo Schanstra, Yervant Zorian |
| 1995 | DATE | Area versus detection latency trade-offs in self-checking memory design. | O. Kebichi, Yervant Zorian, Michael Nicolaidis |
| 1995 | ITC | An Effective BIST Scheme for Booth Multipliers. | Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian |
| 1995 | ITC | An Approach for Designing Total-Dose Tolerant MCMs Based on Current Monitoring. | Fabian Vargas, Michael Nicolaidis, Yervant Zorian |
| 1994 | ITC | Do You Practice Safe Tests? What We Found Out About Your Habits. | Cecil A. Dean, Yervant Zorian |
| 1994 | ITC | An Effective BIST Scheme for Ring-Address Type FIFOs. | Yervant Zorian, Ad J. van de Goor, Ivo Schanstra |
| 1994 | VTS | Fault models and tests for Ring Address Type FIFOs. | Ad J. van de Goor, Ivo Schanstra, Yervant Zorian |
| 1993 | ITC | PSBIST: A Partial-Scan Based Built-In Self-Test Scheme. | Chih-Jen Lin, Yervant Zorian, Sudipta Bhawmik |
| 1993 | ITC | A Method for Delay Fault Self-Testing of Macrocells. | Harold N. Scholz, Duane R. Aadsen, Yervant Zorian |
| 1993 | VTS | A distributed BIST control scheme for complex VLSI devices. | Yervant Zorian |
| 1992 | ICCD | A Universal Testability Strategy for Multi-Chip Modules Based on BIST and Boundary-Scan. | Yervant Zorian |
| 1990 | ICCAD | Computing the Error Escape Probability in Count-Based Compaction Schemes. | Andr Ivanov, Yervant Zorian |
| 1990 | ITC | EEODM: An effective BIST scheme for ROMs. | Yervant Zorian, Andr Ivanov |
| 1989 | ICCD | Designing fault-tolerant, testable, VLSI processors using the IEEE P1149.1 boundary-scan architecture. | Yervant Zorian, Najmi Jarwala |
| 1984 | ITC | Higher Certainty of Error Coverage by Output Data Modification. | Yervant Zorian, Vinod K. Agarwal |