| 1999 | Delay testing considering power supply noise effects. | Yi-Min Jiang, Angela Krstic, Kwang-Ting Cheng |
| 1999 | Particulate failures for surface-micromachined MEMS. | Tao Jiang, Ronald D. Blanton |
| 1999 | Clustering based techniques for I_DDQ testing. | Sri Jandhyala, Hari Balachandran, Anura P. Jayasumana |
| 1999 | High Time For High Level ATPG. | Mahesh A. Iyer |
| 1999 | The attack of the "Holey Shmoos": a case study of advanced DFD and picosecond imaging circuit analysis (PICA). | William V. Huott, Moyra K. McManus, Daniel R. Knebel, Steve Steen, Dennis Manzer, Pia N. Sanda, Steven C. Wilson, Yuen H. Chan, Antonio Pelella, Stanislav Polonsky |
| 1999 | Effective oscillation-based test for application to a DTMF filter bank. | Gloria Huertas, Diego Vzquez, Adoracin Rueda, Jos L. Huertas |
| 1999 | Logic BIST for large industrial designs: real issues and case studies. | Graham Hetherington, Tony Fryars, Nagesh Tamarapalli, Mark Kassab, Abu S. M. Hassan, Janusz Rajski |
| 1999 | Static Component Interconnection Test Technology (SCITT). | Steffen Hellmold |
| 1999 | Testing reusable IP-a case study. | Peter Harrod |
| 1999 | VLSI design 101 - The test module. | John Harrington |
| 1999 | Port interference faults in two-port memories. | Said Hamdioui, Ad J. van de Goor |
| 1999 | Closing The Gap Between Process Development and Mixed Signal Design and Testing. | Hosam Haggag |
| 1999 | Checking sequence generation for asynchronous sequential elements. | Sezer Gren, F. Joel Ferguson |
| 1999 | Industrial evaluation of stress combinations for march tests applied to SRAMs. | Ad J. van de Goor, Ivo Schanstra |
| 1999 | Fault diagnosis in scan-based BIST using both time and space information. | Jayabrata Ghosh-Dastidar, Debaleena Das, Nur A. Touba |
| 1999 | Minimized power consumption for scan-based BIST. | Stefan Gerstendrfer, Hans-Joachim Wunderlich |
| 1999 | Defect detection using power supply transient signal analysis. | Amy Germida, Zheng Yan, James F. Plusquellic, Fidel Muradali |
| 1999 | RF (gigahertz) ATE production testing on wafer: options and tradeoffs. | Dean A. Gahagan |
| 1999 | Analog Fault Simulation: Key to Product Quality, or a Foot in the Door. | Craig Force |
| 1999 | A comparison of bridging fault simulation methods. | R. Scott Fetherston, Imtiaz P. Shaik, Siyad C. Ma |
| 1999 | DFT, DFY, DFR: Who Cares? | R. Scott Fetherston |
| 1999 | Applications of semiconductor test economics, and multisite testing to lower cost of test. | Andrew C. Evans |
| 1999 | Modeling the probability of defect excitation for a commercial IC with implications for stuck-at fault-based ATPG strategies. | Jennifer Dworak, Michael R. Grimaila, Sooryong Lee, Li-C. Wang, M. Ray Mercer |
| 1999 | Design for testability: it is time to deliver it for Time-to-Market. | Bulent I. Dervisoglu |
| 1999 | ITC'99 Benchmark Circuits - Preliminary Results. | Scott Davidson |