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IEEE International Test Conference

ITC

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering

Papers indexed

4,920

1981–2025

Papers per year

1981207 peak2025

ITC papers

4,920 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
1999A new method for jitter decomposition through its distribution tail fitting.Mike Peng Li, Jan B. Wilstrup, Ross Jessen, Dennis Petrich
1999Design for (physical) debug for silicon microsurgery and probing of flip-chip packaged integrated circuits.Richard H. Livengood, Donna Medeiros
1999The integration of boundary-scan test methods to a mixed-signal environment.Adam W. Ley
1999Critical path identification and delay tests of dynamic circuits.Kyung Tek Lee, Jacob A. Abraham
1999Eliminating the Ouija board: automatic thresholds and probabilistic I_DDQ diagnosis.David B. Lavo, Tracy Larrabee, Jonathon E. Colburn
1999Exploiting defect clustering to screen bare die for infant mortality failures: an experimental study.David R. Lakin II, Adit D. Singh
1999Relating linearity test results to design flaws of pipelined analog to digital converters.Turker Kuyel, Haydar Bilhan
1999Linearity testing issues of analog to digital converters.Turker Kuyel
1999Transient current testing of 0.25 μm CMOS devices.Bram Kruseman, Peter Janssen, Victor Zieren
1999Benchmarking DAT with the ITC'99 ATPG Benchmarks.Mario Konijnenburg, Hans van der Linden, Jeroen Geuzebroek
1999Testability of the Philips 80C51 micro-controller.M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor
1999Flexible ATE module with reconfigurable circuit and its application [to CMOS imager test].Tagashi Kitagaki
1999Towards reducing "functional only" fails for the UltraSPARC microprocessors.Anjali Kinra
1999A probe scheduling algorithm for MCM substrates.Bruce C. Kim, Pinshan Jiang, Se Hyun Park
1999Delay fault testing of IP-based designs via symbolic path modeling.HyungWon Kim, John P. Hayes
1999A high-level BIST synthesis method based on a region-wise heuristic for an integer linear programming.Han Bin Kim, Dong Sam Ha
1999Speed-up of high accuracy analog test stimulus optimization.Abdelhakim Khouas, Anne Derieux
1999Using STIL to describe embedded core test requirements.Brion L. Keller
1999Test support processors for enhanced testability of high performance circuits.David C. Keezer, Q. Zhou
1999High level ATPG is important and is on its way!Rohit Kapur
1999Is Analog Fault Simulation a Key to Product Quality? Practical Considerations.Bozena Kaminska
1999Static component interconnection test technology in practice.Frans G. M. de Jong, Rob Raaijmakers
1999SCITT: Back to Basics in Mass Production Testing.Frans G. M. de Jong
1999Is DFT right for you?Jim Johnson
1999Statistical threshold formulation for dynamic I_dd test.Wanli Jiang, Bapiraju Vinnakota
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