| 1997 | Bridging Fault Diagnosis in the Absence of Physical Information. | David B. Lavo, Tracy Larrabee, F. Joel Ferguson, Brian Chess, Jayashree Saxena, Kenneth M. Butler |
| 1997 | Design for Primitive Delay Fault Testability. | Angela Krstic, Kwang-Ting Cheng, Srimat T. Chakradhar |
| 1997 | Oscillation and Sequential Behavior Caused by Interconnect Opens in Digital CMOS Circuits. | Haluk Konuk, F. Joel Ferguson |
| 1997 | Sequential Test Generation with Advanced Illegal State Search. | M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor |
| 1997 | Development of a MEMS Testing Methodology. | Abhijeet Kolpekwar, Ronald D. Blanton |
| 1997 | ASIC Manufacturing Test Cost Prediction at Early Design Stage. | Von-Kyoung Kim, Tom Chen, Mick Tegethoff |
| 1997 | Using BIST Control for Pattern Generation. | Gundolf Kiefer, Hans-Joachim Wunderlich |
| 1997 | ACT: A DFT Tool for Self-Timed Circuits. | Ajay Khoche, Erik Brunvand |
| 1997 | Intrinsic Leakage in Low-Power Deep Submicron CMOS ICs. | Ali Keshavarzi, Kaushik Roy, Charles F. Hawkins |
| 1997 | Low-Cost ATE PinElectronics for Multigigabit-per-Second At-Speed Test. | David C. Keezer, R. J. Wenzel |
| 1997 | Analog and Mixed-Signal Benchmark Circuits-First Release. | Bozena Kaminska, Karim Arabi, I. Bell, Jos L. Huertas, Bruce C. Kim, Adoracin Rueda, Mani Soma, Prashant Goteti |
| 1997 | Pin Margin Analysis. | Robert E. Huston |
| 1997 | 1149.5: Now It's a Standard, So What? | Harry Hulvershorn |
| 1997 | System-Level Boundary-Scan in a Highly Integrated Switch. | William J. Hughes III |
| 1997 | Error Tracer: A Fault-Simualtion-Based Approach to Design Error Diagnosis. | Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, David Ihsin Cheng |
| 1997 | Analog Fault Diagnosis for Unpowered Circuit Boards. | Jiun-Lang Huang, Kwang-Ting Cheng |
| 1997 | The Application of Novel Failure Analysis Techniques for Advanced Multi-Layered CMOS Devices. | Yeoh Eng Hong, Martin Tay Tiong We |
| 1997 | Signature Analysis for IC Diagnosis and Failure Analysis. | Christopher L. Henderson, Jerry M. Soden |
| 1997 | Future Management of the Semiconductor Manufacturing Process. | James T. Healy |
| 1997 | The Implementation of Pseudo-Random Memory Tests on Commercial Memory Testers. | Ad J. van de Goor, Mike Lin |
| 1997 | An Effective BIST Scheme for Arithmetic Logic Units. | Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian, Mihalis Psarakis |
| 1997 | A Low-Overhead Design for Testability and Test Generation Technique for Core-Based Systems. | Indradeep Ghosh, Niraj K. Jha, Sujit Dey |
| 1997 | Current Signatures: Application. | Anne E. Gattiker, Wojciech Maly |
| 1997 | Embedded Core Test Plug-n-Play: Is It Achievable? | Rudy Garcia |
| 1997 | Optical Communication Channel Test Using BIST Approaches. | Mathieu Gagnon, Bozena Kaminska |