| 1997 | Hardware Compression Speeds on Bitmap Fail Display. | Robert Gage, Ben Brown, John Donaldson, Alexander Joffe |
| 1997 | Logic Diagnosis-Diversion or Necessity? | W. Kent Fuchs |
| 1997 | HABIST: Histogram-Based Analog Built-In Self-Test. | Arnold Frisch, Thomas Almy |
| 1997 | Testing the 400-MHz IBM Generation-4 CMOS Chip. | Thomas G. Foote, Dale E. Hoffman, William V. Huott, Timothy J. Koprowski, Bryan J. Robbins, Mary P. Kusko |
| 1997 | A Simulation-Based JTAG ATPG Optimized for MCMs. | Andrew Flint |
| 1997 | Testability Features of AMD-K6 | R. Scott Fetherston, Imtiaz P. Shaik, Siyad C. Ma |
| 1997 | I | Antoni Ferr, Joan Figueras |
| 1997 | On Using Machine Learning for Logic BIST. | Christophe Fagot, Patrick Girard, Christian Landrault |
| 1997 | Signal Generation Using Periodic Single-and Multi-Bit Sigma-Delta Modulated Streams. | Benoit Dufort, Gordon W. Roberts |
| 1997 | BART: A Bridging Fault Test Generation for Sequential Circuits. | James P. Cusey, Janak H. Patel |
| 1997 | IEEE P1149.4-Almost a Standard. | Adam Cron |
| 1997 | Testability Analysis and ATPG on Behavioral RT-Level VHDL. | Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda |
| 1997 | Low Current and Low Voltages-The High-End OP AMP Testing Challenge. | Bob Cometta, Jan Witte |
| 1997 | Transient Power Supply Voltage (V | Edward I. Cole Jr., Jerry M. Soden, Paiboon Tangyunyong, Patrick L. Candelaria, Richard W. Beegle, Daniel L. Barton, Christopher L. Henderson, Charles F. Hawkins |
| 1997 | Addressing Early Design-For-Test Synthesis in a Production Environment. | Vivek Chickermane, Kamran Zarrineh |
| 1997 | Analytic Models for Crosstalk Delay and Pulse Analysis Under Non-Ideal Inputs. | Weiyu Chen, Melvin A. Breuer, Sandeep K. Gupta |
| 1997 | Effective Path Selection for Delay Fault Testing of Sequential Circuits. | Tapan J. Chakraborty, Vishwani D. Agrawal |
| 1997 | Test Width Compression for Built-In Self Testing. | Krishnendu Chakrabarty, Jian Liu, Minyao Zhu, Brian T. Murray |
| 1997 | Pentium | Adrian Carbine, Derek Feltham |
| 1997 | On-Line Testable Logic Desgin for FPGA Implementation. | Alfred L. Burress, Parag K. Lala |
| 1997 | Solder Paste Inspection: Process Control for Defect Reduction. | Donald Burr |
| 1997 | Design of Cache Test Hardware on the HP PA8500. | Jeff Brauch, Jay Fleischman |
| 1997 | High-Performance Production Test Contractors for Fine-Pitch Integrated Circuits. | James J. Brandes |
| 1997 | Algorithms for Switch Level Delay Fault Simulation. | Soumitra Bose, Vishwani D. Agrawal, Thomas G. Szymanski |
| 1997 | The Fail-Stop Controller AE11. | Eberhard Bhl, Thomas Lindenkreuz, R. Stephan |