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IEEE International Test Conference

ITC

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering

Papers indexed

4,920

1981–2025

Papers per year

1981207 peak2025

ITC papers

4,920 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
1997Experimental Results for Current-Based Analog Scan.Thomas M. Bocek, Tuyen D. Vu, Mani Soma, Jason D. Moffatt
1997iJ. S. Beasley, S. Pour-Mozafari, D. Huggett, Alan W. Righter, C. J. Apodaca
1997The Search for the Universal Probe Card Solution.R. Dennis Bates
1997H-SCAN+: A Practical Low-Overhead RTL Design-for-Testability Technique for Industrial Designs.Toshiharu Asaka, Masaaki Yoshida, Subhrajit Bhattacharya, Sujit Dey
1997Experiences with Implementation of IRalf Arnold, Markus Feuser, Horst-Udo Wedekind, Thorsten Bode
1997Oscillation Built-In Self Test (OBIST) Scheme for Functional and Structural Testing of Analog and Mixed-Signal Integrated Circuits.Karim Arabi, Bozena Kaminska
1997Design and Realization of an Accurate Built-In Current Sensor for On-Line Power Dissipation Measurement and IKarim Arabi, Bozena Kaminska
1997Thoughts on Core Integration and Test.Thomas L. Anderson
1997Embedded At-Speed Test Probe.Mitch Aigner
1997A Self-Test Circuit for Evaluating Memory Sense-Amplifier Signal.R. Dean Adams, Edmond S. Cooley, Patrick R. Hansen
1997An On-Line Self-Testing Switched-Current Integrator.Osama K. Abu-Shahla, Ian M. Bell
1996Two-Dimensional Test Data Decompressor for Multiple Scan Designs.Nadime Zacharia, Janusz Rajski, Jerzy Tyszer, John A. Waicukauski
1996A Global Algorithm for the Partial Scan Design Problem Using Circuit State Information.Dong Xiang, Janak H. Patel
1996BIST Fault Diagnosis in Scan-Based VLSI Environments.Yuejian Wu, Saman Adham
1996Two New Techniques for Identifying Opens on Printed Circuit Boards: Analog Junction Test, and Radio Frequency Induction Test.Joe Wrinn
1996Test Generation for Ultra-Large Circuits Using ATPG Constraints and Test-Pattern Templates.Peter Wohl, John A. Waicukauski
1996IThomas W. Williams, Robert H. Dennard, Rohit Kapur, M. Ray Mercer, Wojciech Maly
1996Proposal to Simplify Development of a Mixed-Signal Test Standard.Lee Whetsel
1996A Roadmap for Boundary-Scan Test Reuse.D. Eugene Wedge, Tom Conner
1996Using Target Faults To Detect Non-Tartget Defects.Li-C. Wang, M. Ray Mercer, Thomas W. Williams
1996Analog/Digital Testing of Loaded Boards Without Dedicated Test Points.Christophe Vaucher, Louis Balme
1996An Overview of CMOS VLSI Failure Analysis and the Importance of Test and Diagnostics.David P. Vallett
1996Capacitive Leadframe Testing.Ted T. Turner
1996LFSR Reseeding as a Component of Board Level BIST.Pieter M. Trouborst
1996Testability-Oriented Hardware/Software Partitioning.Yves Le Traon, Ghassan Al Hayek, Chantal Robach
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