IEEE International Test Conference
ITC
A
CORE rank
CORE rank (raw)
A
Fields of research
Computer Systems Engineering
Papers indexed
4,920
1981–2025
Papers per year
1981207 peak2025
Most published authors
ITC papers
4,920 records sourced from DBLP. Search titles, filter by year, sort by recency.
| Year | Title | Authors |
|---|---|---|
| 2020 | Industrial Application of IJTAG Standards to the Test of Big-A/little-d devices. | Hans Martin von Staudt, Mohamed Anas Benhebibi, Jeff Rearick, Michael Laisne |
| 2020 | Test Challenges of Intel IA Cores. | Uri Shpiro, Khen Wee, Kun-Han Tsai, Justyna Zawada, Xijiang Lin |
| 2020 | Methods for Susceptibility Analysis of Logic Gates in the Presence of Single Event Transients. | Rafael B. Schvittz, Paulo F. Butzen, Leomar S. da Rosa |
| 2020 | High Speed Serial Links Risk Assessment in Industrial Post-Silicon Validation Exploiting Machine Learning Techniques. | Cesar A. Snchez-Martnez, Paulo Lpez-Meyer, Esdras Jurez-Hernndez, Aaron Desiga-Orenday, Andrs Viveros-Wacher |
| 2020 | Schmitt Trigger-Based Key Provisioning for Locking Analog/RF Integrated Circuits. | Adriana C. Sanabria-Borbon, Nithyashankari Gummidipoondi Jayasankaran, Sir Yee Lee, Edgar Snchez-Sinencio, Jiang Hu, Jeyavijayan (JV) Rajendran |
| 2020 | Robust DfT Techniques for Built-in Fault Detection in Operational Amplifiers with High Coverage. | Marampally Saikiran, Mona Ganji, Degang Chen |
| 2020 | Avionics Simulation Environment. | Hseyin Sagirkaya, Gkhan Durgun |
| 2020 | Machine Intelligence for Efficient Test Pattern Generation. | Soham Roy, Spencer K. Millican, Vishwani D. Agrawal |
| 2020 | Automating Design For Yield: Silicon Learning to Predictive Models and Design Optimization. | Srikanth Venkataraman, Pongpachara Limpisathian, Pascal Meinerzhagen, Suriyaprakash Natarajan, Eric Yang |
| 2020 | Selecting Close-to-Functional Path Delay Faults for Test Generation. | Irith Pomeranz |
| 2020 | Using Volume Cell-aware Diagnosis Results to Improve Physical Failure Analysis Efficiency. | Hanson Peng, Mao-Yuan Hsia, Man-Ting Pang, I.-Y. Chang, Jeff Fan, Huaxing Tang, Manish Sharma, Wu Yang |
| 2020 | Unsupervised Root-Cause Analysis for Integrated Systems. | Renjian Pan, Zhaobo Zhang, Xin Li, Krishnendu Chakrabarty, Xinli Gu |
| 2020 | SAT-ATPG Generated Multi-Pattern Scan Tests for Cell Internal Defects: Coverage Analysis for Resistive Opens and Shorts. | Sujay Pandey, Zhiwei Liao, Shreyas Nandi, Sanya Gupta, Suriyaprakash Natarajan, Arani Sinha, Adit D. Singh, Abhijit Chatterjee |
| 2020 | Novel Eye Diagram Estimation Technique to Assess Signal Integrity in High-Speed Memory Test. | Youngsu Oh, Dongmin Han, Byeongseon Go, Seungtaek Lee, Woosik Jeong |
| 2020 | Improved Chain Diagnosis Methodology for Clock and Control Signal Defect Identification. | Bharath Nandakumar, Sameer Chillarige, Anil Malik, Atul Chabbra, Nicholai L'Esperance, Robert Redburn |
| 2020 | Memory repair logic sharing techniques and their impact on yield. | Benoit Nadeau-Dostie, Luc Romain |
| 2020 | Concurrent Error Detection in Embedded Digital Control of Nonlinear Autonomous Systems Using Adaptive State Space Checks. | Md Imran Momtaz, Chandramouli N. Amarnath, Abhijit Chatterjee |
| 2020 | A Learning-Based Cell-Aware Diagnosis Flow for Industrial Customer Returns. | Safa Mhamdi, Patrick Girard, Arnaud Virazel, Alberto Bosio, Aymen Ladhar |
| 2020 | Fast Bring-Up of an AI SoC through IEEE 1687 Integrating Embedded TAPs and IEEE 1500 Interfaces. | Haiying Ma, Ligang Lu, Haitao Qian, Jing Han, Xin Wen, Fanjin Meng, Rahul Singhal, Martin Keim, Yu Huang, Wu Yang |
| 2020 | Security Preserving Integration and Resynthesis of Reconfigurable Scan Networks. | Natalia Lylina, Ahmed Atteya, Chih-Hao Wang, Hans-Joachim Wunderlich |
| 2020 | Data-driven fault model development for superconducting logic. | Mingye Li, Fangzhou Wang, Sandeep Gupta |
| 2020 | X-Tolerant Tunable Compactor for In-System Test. | Yingdi Liu, Sylwester Milewski, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, Bartosz Wldarczak |
| 2020 | Online Fault Detection in ReRAM-Based Computing Systems by Monitoring Dynamic Power Consumption. | Mengyun Liu, Krishnendu Chakrabarty |
| 2020 | Fail Memory Configuration Set for RA Estimation. | Hayoung Lee, Keewon Cho, Sungho Kang, Wooheon Kang, Seungtaek Lee, Woosik Jeong |
| 2020 | Modeling Novel Non-JTAG IEEE 1687-Like Architectures. | Mike Laisne, Alfred L. Crouch, Michele Portolan, Martin Keim, Hans Martin von Staudt, M. Abdalwahab, Bradford G. Van Treuren, Jeff Rearick |
351–375 of 4,920← PreviousNext →
Comparable venues
Other A*/A conferences filed under the same field of research.
- ADATEDesign, Automation and Test in Europe Conference
- A*DACDesign Automation Conf
- ASCInternational Conference for High Performance Computing, Networking, Storage and Analysis (was Supercomputing Conference)
- AICCADIEEE/ACM International Conference on Computer-Aided Design
- A*ISCAACM International Symposium on Computer Architecture
- A*MICROInternational Symposium on Microarchitecture
- AISLPEDIEEE/ACM International Symposium on Low Power Electronics and Design
- AICSACM International Conference on Supercomputing