| 2008 | Managing Test in the End-to-End, Mega Supply Chain. | Mike Lydon |
| 2008 | A Generic Framework for Scan Capture Power Reduction in Test Compression Environment. | Xiao Liu, Feng Yuan, Qiang Xu |
| 2008 | Diagnosis of Logic-to-chain Bridging Faults. | Wei-Chih Liu, Wei-Lin Tsai, Hsiu-Ting Lin, James Chien-Mo Li |
| 2008 | Capture and Shift Toggle Reduction (CASTR) ATPG to Minimize Peak Power Supply Noise. | Hsiu-Ting Lin, Jen-Yang Wen, James Li, Ming-Tung Chang, Min-Hsiu Tsai, Sheng-Chih Huang, Chili-Mou Tseng |
| 2008 | Test Generation for Interconnect Opens. | Xijiang Lin, Janusz Rajski |
| 2008 | Evaluating the Effectiveness of Physically-Aware N-Detect Test using Real Silicon. | Yen-Tzu Lin, Osei Poku, Ronald D. Blanton, Phil Nigh, Peter Lloyd, Vikram Iyengar |
| 2008 | A Low-Cost Programmable Memory BIST Design for Multiple Memory Instances. | Chung-Fu Lin, Chia-Fu Huang, De-Chung Lu, Chih-Chiang Hsu, Wen-Tsung Chiu, Yu-Wei Chen, Yeong-Jar Chang |
| 2008 | Jitter and Signal Integrity Verification for Synchronous and Asynchronous I/Os at Multiple to 10 GHz/Gbps. | Mike Peng Li |
| 2008 | A Novel Pattern Generation Framework for Inducing Maximum Crosstalk Effects on Delay-Sensitive Paths. | Jeremy Lee, Mohammad Tehranipoor |
| 2008 | Failing Frequency Signature Analysis. | Jaekwang Lee, Edward J. McCluskey |
| 2008 | SOC Test Optimization with Compression-Technique Selection. | Anders Larsson, Xin Zhang, Erik Larsson, Krishnendu Chakrabarty |
| 2008 | Analysis of Retention Time Distribution of Embedded DRAM - A New Method to Characterize Across-Chip Threshold Voltage Variation. | Wei Kong, Paul C. Parries, G. Wang, Subramanian S. Iyer |
| 2008 | VLSI Test Exercise Courses for Students in EE Department. | Satoshi Komatsu |
| 2008 | Distributed Embedded Logic Analysis for Post-Silicon Validation of SOCs. | Ho Fai Ko, Adam B. Kinsman, Nicola Nicolici |
| 2008 | Wafer-Level Characterization of Probecards using NAC Probing. | Gyu-Yeol Kim, Eon-Jo Byunb, Ki-Sang Kang, Young-Hyun Jun, Bai-Sun Kong |
| 2008 | A Tutorial on STDF Fail Datalog Standard. | Ajay Khoche, Phil Burlison, John Rowe, Glenn Plowman |
| 2008 | An Electronic Module for 12.8 Gbps Multiplexing and Loopback Test. | David C. Keezer, Dany Minier, Patrice Ducharme, A. M. Majid |
| 2008 | Direct Cell-Stability Test Techniques for an SRAM Macro with Asymmetric Cell-Bias-Voltage Modulation. | Akira Katayama, Tomoaki Yabe, Osamu Hirabayashi, Yasuhisa Takeyama, Keiichi Kushida, Takahiko Sasaki, Nobuaki Otsuka |
| 2008 | On the Correlation between Controller Faults and Instruction-Level Errors in Modern Microprocessors. | Naghmeh Karimi, Michail Maniatakos, Abhijit Jas, Yiorgos Makris |
| 2008 | Linearity Test Time Reduction for Analog-to-Digital Converters Using the Kalman Filter with Experimental Parameter Estimation. | Le Jin |
| 2008 | Built-in Self-Calibration of On-chip DAC and ADC. | Wei Jiang, Vishwani D. Agrawal |
| 2008 | Implicit Identification of Non-Robustly Unsensitizable Paths using Bounded Delay Model. | Dheepakkumaran Jayaraman, Edward Flanigan, Spyros Tragoudas |
| 2008 | VAST: Virtualization-Assisted Concurrent Autonomous Self-Test. | Hiroaki Inoue, Yanjing Li, Subhasish Mitra |
| 2008 | Is It Cost-Effective to Achieve Very High Fault Coverage for Testing Homogeneous SoCs with Core-Level Redundancy? | Lin Huang, Qiang Xu |
| 2008 | On Accelerating Path Delay Fault Simulation of Long Test Sequences. | I-De Huang, Yi-Shing Chang, Suriyaprakash Natarajan, Ramesh Sharma, Sandeep K. Gupta |