| 2008 | FPGA Time Measurement Module: Preliminary Results. | William J. Bowhers |
| 2008 | CONCAT: CONflict Driven Learning in ATPG for Industrial designs. | Surendra Bommu, Kameshwar Chandrasekar, Rahul Kundu, Sanjay Sengupta |
| 2008 | Improving the Accuracy of Test Compaction through Adaptive Test Update. | Sounil Biswas, Ronald D. Blanton |
| 2008 | Robust Design-for-Productization Practices for High Quality Automotive Products. | Paolo Bernardi, Fabio Melchiori, Davide Pandini, Santo Pugliese, Davide Appello |
| 2008 | Diagnosis of design-silicon timing mismatch with feature encoding and importance ranking - the methodology explained. | Pouria Bastani, Nicholas Callegari, Li-C. Wang, Magdy S. Abadir |
| 2008 | Low Power Test. | Swapnil Bahl, Rajiv Sarkar, Akhil Garg |
| 2008 | Hardware Overhead Reduction for Memory BIST. | Masayuki Arai, Kazuhiko Iwasaki, Michinobu Nakao, Iwao Suzuki |
| 2008 | Generating Test Signals for Noise-Based NPR/ACPR Type Tests in Production. | Sadok Aouini, Gordon W. Roberts |
| 2008 | Peak Power Reduction Through Dynamic Partitioning of Scan Chains. | Sobeeh Almukhaizim, Ozgur Sinanoglu |
| 2008 | Hardware-based Error Rate Testing of Digital Baseband Communication Systems. | Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn |
| 2008 | "Plug & Test" at System Level via Testable TLM Primitives. | Homa Alemzadeh, Stefano Di Carlo, Fatemeh Refan, Paolo Prinetto, Zainalabedin Navabi |
| 2008 | NoC Reconfiguration for Utilizing the Largest Fault-free Connected Sub-structure. | Armin Alaghi, Mahshid Sedghi, Naghmeh Karimi, Zainalabedin Navabi |
| 2008 | Design for Test of Asynchronous NULL Convention Logic (NCL) Circuits. | Waleed K. Al-Assadi, Sindhu Kakarla |
| 2008 | Defect Oriented Testing of the Strap Problem Under Process Variations in DRAMs. | Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor, Georg Mueller |
| 2008 | DFT Architecture for Automotive Microprocessors using On-Chip Scan Compression supporting Dual Vendor ATPG. | Heiko Ahrens, Rolf Schlagenhaft, Helmut Lang, V. Srinivasan, Enrico Bruzzano |
| 2008 | Optimized Circuit Failure Prediction for Aging: Practicality and Promise. | Mridul Agarwal, Varsha Balakrishnan, Anshuman Bhuyan, Kyunglok Kim, Bipul C. Paul, Wenping Wang, Bo Yang, Yu Cao, Subhasish Mitra |
| 2008 | Bridging the gap between Design and Test Engineering for Functional Pattern Development. | Ernst Aderholz, Heiko Ahrens, Michael Rohleder |
| 2008 | Parametric Testing of Optical Interfaces. | Brice Achkir, Pavel Zivny, Bill Eklow |
| 2008 | Optimized EVM Testing for IEEE 802.11a/n RF ICs. | Erkan Acar, Sule Ozev, Ganesh Srinivasan, Friedrich Taenzler |
| 2007 | Design-for-reliability: A soft error case study. | Ming Zhang |
| 2007 | A methodology for systematic built-in self-test of phase-locked loops targeting at parametric failures. | Guo Yu, Peng Li |
| 2007 | An FFT-based jitter separation method for high-frequency jitter testing with a 10x reduction in test time. | Takahiro J. Yamaguchi, H. X. Hou, Koji Takayama, Dave Armstrong, Masahiro Ishida, Mani Soma |
| 2007 | Test-wrapper designs for the detection of signal-integrity faults on core-external interconnects of SoCs. | Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty |
| 2007 | Achieving high transition delay fault coverage with partial DTSFF scan chains. | Gefu Xu, Adit D. Singh |
| 2007 | Pattern-directed circuit virtual partitioning for test power reduction. | Qiang Xu, Dianwei Hu, Dong Xiang |