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IEEE International Test Conference

ITC

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering

Papers indexed

4,920

1981–2025

Papers per year

1981207 peak2025

ITC papers

4,920 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2007Functional testing of digital microfluidic biochips.Tao Xu, Krishnendu Chakrabarty
2007A fully digital-compatible BIST strategy for ADC linearity testing.Hanqing Xing, Hanjun Jiang, Degang Chen, Randall L. Geiger
2007Fast and effective fault simulation for path delay faults based on selected testable paths.Dong Xiang, Yang Zhao, Kaiwei Li, Hideo Fujiwara
2007Statistical analysis and optimization of parametric delay test.Sean Hsi Yuan Wu, Benjamin N. Lee, Li-C. Wang, Magdy S. Abadir
2007Fully X-tolerant combinational scan compression.Peter Wohl, John A. Waicukauski, Sanjay Ramnath
2007Car IC test changing but the same quality goal.Gary Wittie
2007A novel scheme to reduce power supply noise for high-quality at-speed scan testing.Xiaoqing Wen, Kohei Miyase, Seiji Kajihara, Tatsuya Suzuki, Yuta Yamato, Patrick Girard, Yuji Ohsumi, Laung-Terng Wang
2007A low cost test data compression technique for high n-detection fault coverage.Seongmoon Wang, Zhanglei Wang, Wenlong Wei, Srimat T. Chakradhar
2007The design-for-testability features of a general purpose microprocessor.Da Wang, Xiaoxin Fan, Xiang Fu, Hui Liu, Ke Wen, Rui Li, Huawei Li, Yu Hu, Xiaowei Li
2007ACCE: Automatic correction of control-flow errors.Ramtilak Vemu, Sankar Gurumurthy, Jacob A. Abraham
2007Automated handling of programmable on-product clock generation (OPCG) circuitry for delay test vector generation.Anis Uzzaman, Bibo Li, Thomas J. Snethen, Brion L. Keller, Gary Grise
2007Silicon evaluation of longest path avoidance testing for small delay defects.Ritesh P. Turakhia, W. Robert Daasch, Mark Ward, John Van Slyke
2007JTAG system test in a MicroTCA world.Bradford G. Van Treuren, Adam W. Ley
2007X-canceling MISR - An X-tolerant methodology for compacting output responses with unknowns using a MISR.Nur A. Touba
2007Diagnosis for MRAM write disturbance fault.Chin-Lung Su, Chih-Wea Tsai, Cheng-Wen Wu, Ji-Jan Chen, Wen Ching Wu, Chien-Chung Hung, Ming-Jer Kao
2007A selt-testing BOST for high-frequency PLLs, DLLs, and SerDes.Stephen K. Sunter, Aubin Roy
2007Low cost automatic mixed-signal board test using IEEE 1149.4.Srividya Sundar, Bruce C. Kim, Toby Byrd, Felipe Toledo, Sudhir Wokhlu, Erika Beskar, Raul Rousselin, David Cotton, Gary Kendall
2007Faster defect localization in nanometer technology based on defective cell diagnosis.Manish Sharma, Wu-Tung Cheng, Ting-Pu Tai, Y. S. Cheng, Will Hsu, Chen Liu, Sudhakar M. Reddy, Albert Mann
2007ERTG: A test generator for error-rate testing.Shideh Shahidi, Sandeep K. Gupta
2007Test cost reduction for the AMD™ Athlon processor using test partitioning.Anuja Sehgal, Jeff Fitzgerald, Jeff Rearick
2007Backside E-Beam Probing on Nano scale devices.Rudolf Schlangen, Reiner Leihkauf, Uwe Kerst, Christian Boit, Rajesh Jain, Tahir Malik, Keneth R. Wilsher, Ted R. Lundquist, Bernd Krger
2007A stereo audio Σ∑ ADC architecture with embedded SNDR self-test.Lus Rolndez, Salvador Mir, Jean-Louis Carbonro, Dimitri Goguet, Nabil Chouba
2007Measurement ratio testing for improved quality and outlier detection.Jeffrey L. Roehr
2007Power-aware test: Challenges and solutions.Srivaths Ravi
2007Critical roles of RF and microwave electromagnetic field solver simulators in multi-gigabit high-speed digital applications.Minh Quach, Mark Hinton, Regee Petaja
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