| 2006 | Fault Modeling and Detection for Drowsy SRAM Caches. | Wei Pei, Wen-Ben Jone, Yiming Hu |
| 2006 | Signature Analyzer Design for Yield Learning Support. | Nishant Patil, Subhasish Mitra, Steven S. Lumetta |
| 2006 | A Functional Coverage Metric for Estimating the Gate-Level Fault Coverage of Functional Tests. | Sungchul Park, Li Chen, Praveen Parvathala, Srinivas Patil, Irith Pomeranz |
| 2006 | HDL Program Slicing to Reduce Bounded Model Checking Search Overhead. | Jen-Chieh Ou, Daniel G. Saab, Jacob A. Abraham |
| 2006 | Modeling and Testing Process Variation in Nanometer CMOS. | Mehrdad Nourani, Arun Radhakrishnan |
| 2006 | Fully automated semiconductor operating condition testing. | Thomas Nirmaier, Wolfgang Spirkl, Eric Liau Chee Hong |
| 2006 | The Role of ATPG Fault Diagnostics in Driving Physical Analysis. | Roger Nicholson, Cathy Kardach, Bruce Cory |
| 2006 | Improved Match-Line Test and Repair Methodology Including Power-Supply Noise Testing for Content-Addressable Memories. | Rahul Nadkarni, Igor Arsovski, Reid Wistort, Valerie Chickanosky |
| 2006 | Combinational Logic Soft Error Correction. | Subhasish Mitra, Ming Zhang, Saad Waqas, Norbert Seifert, Balkaran S. Gill, Kee Sup Kim |
| 2006 | Timing Defect Diagnosis in Presence of Crosstalk for Nanometer Technology. | Vishal J. Mehta, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
| 2006 | The Challenge of Testing the ARM CORTEX-A8 | Teresa L. McLaurin |
| 2006 | The Design, Implementation and Analysis of Test Experiments. | Peter C. Maxwell |
| 2006 | Multi-Gigahertz Testing of Wafer-Level Packaged Devices. | A. M. Majid, David C. Keezer, Jayasanker Jayabalan, Mihai Rotaru |
| 2006 | Periodic Jitter Amplitude Calibration with Walking Strobe. | Lucy Liu, Eddie Lew |
| 2006 | A Multilayer Data Copy Scheme for Low Cost Test with Controlled Scan-In Power for Multiple Scan Chain Designs. | Shih Ping Lin, Chung-Len Lee, Jwu E. Chen, Ji-Jan Chen, Kun-Lun Luo, Wen Ching Wu |
| 2006 | Testable Design for Adaptive Linear Equalizer in High-Speed Serial Links. | Mitchell Lin, Kwang-Ting Cheng |
| 2006 | A Unified Approach to Test Generation and Test Data Volume Reduction. | Yung-Chieh Lin, Kwang-Ting Cheng |
| 2006 | Reusable, Low-cost, and Flexible Multidrop System JTAG Architecture. | Hung-chi Lihn |
| 2006 | Issues on Test Optimization with Known Good Dies and Known Defective Dies - A Statistical Perspective. | Benjamin N. Lee, Li-C. Wang, Magdy S. Abadir |
| 2006 | An Efficient Pruning Method to Guide the Search of Precision Tests in Statistical Timing Space. | Leonard Lee, Li-C. Wang |
| 2006 | Efficient Latch and Clock Structures for System-on-Chip Test Flexibility. | David E. Lackey |
| 2006 | A Novel Ganged DAC Solution for Multi-Site Testing. | Joseph Kwan, Qing Zhao |
| 2006 | Exact At-speed Delay Fault Grading in Sequential Circuits. | Mahilchi Milir Vaseekar Kumar, Spyros Tragoudas, Sreejit Chakravarty, Rathish Jayabharathi |
| 2006 | Selective and Accurate Fail Data Capture in Compression Environment for Volume Diagnostics. | Ajay Khoche, Domenico Chindamo, Michael Braun, Martin Fischer |
| 2006 | Embedded Memory Field Returns - Trials and Tribulations. | Jitendra Khare, Amit B. Shah, Ashok Raman, Girish Rayas |