| 2005 | Layering of the STIL extensions. | Gregory A. Maston, Tony Taylor |
| 2005 | Analyzing second-order effects between optimizations for system-level test-based model generation. | Tiziana Margaria, Harald Raffelt, Bernhard Steffen |
| 2005 | Third-Order Phase Lock Loop Measurement and Characterization. | J. Ma, M. Li, M. Marlett |
| 2005 | The value of statistical testing for quality, yield and test cost improvement. | Robert Madge, Brady Benware, Mark Ward, W. Robert Daasch |
| 2005 | Case study: effectiveness of high-speed scan based feed forward voltage testing in reducing DPPM on a high volume ASIC. | Joel Lurkins, DeAnna Hill, Brady Benware |
| 2005 | Cost-effective designs of field service for electronic systems. | Yu-Ting Lin, David Williams, Tony Ambler |
| 2005 | Column parity and row selection (CPRS): a BIST diagnosis technique for multiple errors in multiple scan chains. | Hung-Mao Lin, James Chien-Mo Li |
| 2005 | Production-oriented interface testing for PCI-Express by enhanced loop-back technique. | Mitchell Lin, Kwang-Ting Cheng, Jimmy Hsu, M. C. Sun, Jason Chen, Shelton Lu |
| 2005 | Computational intelligence based testing for semiconductor measurement systems. | Eric Liau, Doris Schmitt-Landsiedel |
| 2005 | Testing priority address encoder faults of content addressable memories. | Jin-Fu Li |
| 2005 | Compression mode diagnosis enables high volume monitoring diagnosis flow. | Andreas Leininger, Peter Muhmenthaler, Wu-Tung Cheng, Nagesh Tamarapalli, Wu Yang, Kun-Han Hans Tsai |
| 2005 | Hazard-aware statistical timing simulation and its applications in screening frequency-dependent defects. | Benjamin N. Lee, Hui Li, Li-C. Wang, Magdy S. Abadir |
| 2005 | A novel test methodology based on error-rate to support error-tolerance. | Kuen-Jong Lee, Tong-Yu Hsieh, Melvin A. Breuer |
| 2005 | The PXI carrier: a novel approach to ATE instrument development. | Eric Kushnick |
| 2005 | XMAX: a practical and efficient compression architecture. | Kee Sup Kim |
| 2005 | Impact of back side circuit edit on active device performance in bulk silicon ICs. | Uwe Kerst, Rudolf Schlangen, A. Kabakow, Erwan Le Roy, Ted R. Lundquist, Siegfried Pauthner |
| 2005 | Use of MISRs for compression and diagnostics. | Brion L. Keller, Thomas Bartenstein |
| 2005 | Encounter test OPMISR | Brion L. Keller |
| 2005 | Test the test experts: do we know what we are doing? | Rohit Kapur |
| 2005 | Test and debug features of the RTO7 chip. | Kees van Kaam, Bart Vermeulen, Henk Jan Bergveld |
| 2005 | High-performance ADC linearity test using low-precision signals in non-stationary environments. | Le Jin, Kumar L. Parthasarathy, Turker Kuyel, Randall L. Geiger, Degang Chen |
| 2005 | Safely backdriving low voltage devices at in-circuit test. | Chris Jacobsen, Tony Saye, Tom Trader |
| 2005 | Multiple tests for each gate delay fault: higher coverage and lower test application cost. | Shahdad Irajpour, Sandeep K. Gupta, Melvin A. Breuer |
| 2005 | Compressed pattern diagnosis for scan chain failures. | Yu Huang, Wu-Tung Cheng, Janusz Rajski |
| 2005 | Off-shore outsource DFT vs. build off-shore branch offices. | Yu Huang |