| 2004 | IEEE P1500-Compliant Test Wrapper Design for Hierarchical Cores. | Anuja Sehgal, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty |
| 2004 | On-Chip Mixed-Signal Test Structures Re-used for Board Test. | Rodger Schuttert, D. C. L. (Erik) van Geest, A. Kumar |
| 2004 | Minimum Testing Requirements to Screen Temperature Dependent Defects. | Chris Schuermyer, Jens Ruffler, W. Robert Daasch |
| 2004 | Open Architecture ATE: Dream or Reality? | Gordon D. Robinson |
| 2004 | Investment vs. Yield Relationship for Memories and IP in SOC. | Joseph A. Reynick |
| 2004 | Embedded Test for a new Memory-Card Architecture. | David Resnick |
| 2004 | Hierarchical DFT Methodology - A Case Study. | Jeff Remmers, Moe Villalba, Richard Fisette |
| 2004 | ATE Data Collection - A comprehensive requirements proposal to maximize ROI of test. | Manu Rehani, David Abercrombie, Robert Madge, Jim Teisher, Jason Saw |
| 2004 | Impact of Negative Bias Temperature Instability on Product Parametric Drift. | Vijay Reddy, John M. Carulli, Anand T. Krishnan, William Bosch, Brendan Burgess |
| 2004 | Integrating Boundary Scan into Multi-GHz I/O Circuitry. | Jeff Rearick, Sylvia Patterson, Krista Dorner |
| 2004 | A Holistic Parallel and Hierarchical Approach towards Design-For-Test. | C. P. Ravikumar, Graham Hetherington |
| 2004 | Fault Tolerant Arithmetic with Applications in Nanotechnology based Systems. | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
| 2004 | Open Architecture Test System: System Architecture and Design. | Rochit Rajsuman, Masuda Noriyuki |
| 2004 | Simulation Requirements for Vectors in ATE Formats. | R. Raghuraman |
| 2004 | Quasi-Oscillation Based Test for Improved Prediction of Analog Performance Parameters. | Ashwin Raghunathan, Ji Hwan (Paul) Chun, Jacob A. Abraham, Abhijit Chatterjee |
| 2004 | K Longest Paths Per Gate (KLPG) Test Generation for Scan-Based Sequential Circuits. | Wangqi Qiu, Jing Wang, D. M. H. Walker, Divya Reddy, Zhuo Li, Weiping Shi, Hari Balachandran |
| 2004 | Plan Ahead for Yield. | Jun Qian |
| 2004 | AC IO Loopback Design for High Speed Processor IO Test. | Benoit Provost, Chee How Lim, Mo Bashir, Ali Muhtaroglu, Tiffany Huang, Kathy Tian, Mubeen Atha, Cangsang Zhao, Harry Muljono |
| 2004 | Test Programming Environment in a Modular, Open Architecture Test System. | Ankan K. Pramanick, Ramachandran Krishnaswamy, Mark Elston, Toshiaki Adachi, Harsanjeet Singh, Bruce R. Parnas |
| 2004 | Z-DFD: Design-for-Diagnosability Based on the Concept of Z-Detection. | Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy |
| 2004 | CMOS IC diagnostics using the luminescence of OFF-state leakage currents. | Stas Polonsky, Keith A. Jenkins, Alan J. Weger, Shinho Cho |
| 2004 | The Critical Need For Open ATE Architecture. | Sergio M. Perez |
| 2004 | AN SRAM Weak Cell Fault Model and a DFT Technique with a Programmable Detection Threshold. | Andrei Pavlov, Manoj Sachdev, Jos Pineda de Gyvez |
| 2004 | Impact of Body Bias on Delay Fault Testing of Nanoscale CMOS Circuits. | Bipul Chandra Paul, Cassondra Neau, Kaushik Roy |
| 2004 | Divide and Conquer based Fast Shmoo algorithms. | Peter Patten |