| 2004 | The Leading Edge of Production Wafer Probe Test Technology. | William R. Mann, Frederick L. Taber, Philip W. Seitzer, Jerry J. Broz |
| 2004 | In Search of the Optimum Test Set - Adaptive Test Methods for Maximum Defect Coverage and Lowest Test Cost. | Robert Madge, Brady Benware, Ritesh P. Turakhia, W. Robert Daasch, Chris Schuermyer, Jens Ruffler |
| 2004 | ATE Value Add through Open Data Collection. | Robert Madge |
| 2004 | New Test Paradigms for Yield and Manufacturability. | Robert Madge |
| 2004 | Test Scheduling for Network-on-Chip with BIST and Precedence Constraints. | Chunsheng Liu, Hamid Sharif, rika F. Cota, Dhiraj K. Pradhan |
| 2004 | Transfer Functions For The Reference Clock Jitter In A Serial Link: Theory And Applications. | Mike Li, Andy Martwick, Gerry Talbot, Jan B. Wilstrup |
| 2004 | Will "Heisenberg Uncertainty Principle" Hold For Designing and Testing Multiple GB/s ICs? | Mike Li |
| 2004 | Is "Design to Production" The Ultimate Answer For Jitter, Noise, and BER Challenges For Multi GB/s ICs? | Mike Li |
| 2004 | A High-Resolution Flash Time-to-Digital Converter and Calibration Scheme. | Peter M. Levine, Gordon W. Roberts |
| 2004 | Verification on Port Connections. | Geeng-Wei Lee, Juinn-Dar Huang, Jing-Yang Jou, Chun-Yao Wang |
| 2004 | Integrating Core Selection in the SOC Test Solution Design-Flow. | Erik Larsson |
| 2004 | A Model-based Test Approach for Testing High-Speed PLLs and Phase Regulation Circuitry in SOC Devices. | Bernd Laquai |
| 2004 | Logic BIST with Scan Chain Segmentation. | Liyang Lai, Janak H. Patel, Thomas Rinderknecht, Wu-Tung Cheng |
| 2004 | Jitter Models and Measurement Methods for High-Speed Serial Interconnects. | Andy Kuo, Touraj Farahmand, Nelson Ou, Andr Ivanov, Sassan Tabatabaei |
| 2004 | Trends in manufacturing test methods and their implications. | Sandip Kundu, T. M. Mak, Rajesh Galivanche |
| 2004 | Programmable At-Speed Array and Functional BIST for Embedded DRAM LSI. | Masaji Kume, Katsutoshi Uehara, Minoru Itakura, Hideo Sawamoto, Toru Kobayashi, Masatoshi Hasegawa, Hideki Hayashi |
| 2004 | Systematic Defects in Deep Sub-Micron Technologies. | Bram Kruseman, Ananta K. Majhi, Camelia Hora, Stefan Eichenberger, Johan Meirlevede |
| 2004 | On Hazard-free Patterns for Fine-delay Fault Testing. | Bram Kruseman, Ananta K. Majhi, Guido Gronthoud, Stefan Eichenberger |
| 2004 | Test In the Era of "What You see Is NOT What You Get". | Bernd Koenemann |
| 2004 | Testing Micropipelined Asynchronous Circuits. | Matthew L. King, Kewal K. Saluja |
| 2004 | At-Speed Interconnect Test and Diagnosis of External Memories on a System. | Heon C. Kim, Hong Shin Jun, Xinli Gu, Sung Soo Chung |
| 2004 | Memory Yield Improvement - SoC Design Perspective. | Jitendra Khare |
| 2004 | Spectral Analysis for Statistical Response Compaction During Built-In Self-Testing. | Omar I. Khan, Michael L. Bushnell |
| 2004 | An Economic Analysis and ROI Model for Nanometer Test. | Brion L. Keller, Mick Tegethoff, Thomas Bartenstein, Vivek Chickermane |
| 2004 | Modular Extension of ATE to 5 Gbps. | David C. Keezer, Dany Minier, F. Binette |