| 2004 | Within Die Thermal Gradient Impact on Clock-Skew: A New Type of Delay-Fault Mechanism. | Sebasti A. Bota, M. Rosales, Jos Luis Rossell, Jaume Segura, Ali Keshavarzi |
| 2004 | Use of Embedded Sensors for Built-In-Test of RF Circuits. | Soumendu Bhattacharya, Abhijit Chatterjee |
| 2004 | Affordable and Effective Screening of Delay Defects in ASICs using the Inline Resistance Fault Model. | Brady Benware, Cam Lu, John Van Slyke, Prabhu Krishnamurthy, Robert Madge, Martin Keim, Mark Kassab, Janusz Rajski |
| 2004 | Achieving Sub 100 DPPM Defect Levels on VDSM and Nanometer ASICs. | Brady Benware |
| 2004 | Panel 9 - Diagnostics vs. Failure Analysis. | Thomas Bartenstein |
| 2004 | Testing the Configurable Analog Blocks of Field Programmable Analog Arrays. | Tiago R. Balen, Antonio Andrade Jr., Florence Azas, Michel Renovell, Marcelo Lubaszewski |
| 2004 | Improving Encoding Efficiency for Linear Decompressors Using Scan Inversion. | Kedarnath J. Balakrishnan, Nur A. Touba |
| 2004 | Interconnect Test Pattern Generation Algorithm For Meeting Device and Global SSO Limits With Safe Initial Vectors. | Kendrick Baker, Mehrdad Nourani |
| 2004 | Test Cost Reduction Through A Reconfigurable Scan Architecture. | Baris Arslan, Alex Orailoglu |
| 2004 | Practical Instrumentation Integration Considerations. | Thomas J. Anderson |
| 2004 | Evaluation of the Quality of N-Detect Scan ATPG Patterns on a Processor. | M. Enamul Amyeen, Srikanth Venkataraman, Ajay Ojha, Sangbong Lee |
| 2004 | 100 DPPM in Nanometer Technology - Is it achievable? | Greg Aldrich |
| 2004 | A Modular Wrapper Enabling High Speed BIST and Repair for Small Wide Memories. | Robert C. Aitken |
| 2004 | Delayed-RF Based Test Development for FM Transceivers Using Signature Analysis. | Erkan Acar, Sule Ozev |
| 2003 | Yield Threats and Inadequacy of One-time Test. | Yervant Zorian |
| 2003 | Efficient Sequential ATPG for Functional RTL Circuits. | Liang Zhang, Indradeep Ghosh, Michael S. Hsiao |
| 2003 | A New Approach for Low Power Scan Testing. | Takaki Yoshida, Masafumi Watari |
| 2003 | Area and Time Co-Optimization for System-on-a-Chip based on Consecutive Testability. | Tomokazu Yoneda, Tetsuo Uchiyama, Hideo Fujiwara |
| 2003 | Seeing Chip Testability Through a Systems Person's Eyes. | David W. Yen |
| 2003 | Experiments in Detecting Delay Faults using Multiple Higher Frequency Clocks and Results from Neighboring Die. | Haihua Yan, Adit D. Singh |
| 2003 | Extraction Error Diagnosis and Correction in High-Performance Designs. | Yu-Shen Yang, Jiang Brandon Liu, Paul J. Thadikaran, Andreas G. Veneris |
| 2003 | Effects of Deterministic Jitter in a Cable on Jitter Tolerance Measurements. | Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Makoto Kurosawa, Hirobumi Musha |
| 2003 | Open Architecture ATE and 250 Consecutive UIs. | Takahiro J. Yamaguchi |
| 2003 | On Reducing Wrapper Boundary Register Cells in Modular SOC Testing. | Qiang Xu, Nicola Nicolici |
| 2003 | A Hybrid Coding Strategy For Optimized Test Data Compression. | Armin Wrtenberger, Christofer S. Tautermann, Sybille Hellebrand |