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IEEE International Test Conference

ITC

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering

Papers indexed

4,920

1981–2025

Papers per year

1981207 peak2025

ITC papers

4,920 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2003Challenges in Low Cost Test Approach for ARM9TM Core Based Mixed-Signal SoC DragonBallTM-MX1.George Bao
2003Constructive Pattern Generation Heuristic for Meeting SSO Limits.Kendrick Baker
2003HyAC: A Hybrid Structural SAT Based ATPG for Crosstalk.Xiaoliang Bai, Sujit Dey, Angela Krstic
2003Exploiting Programmable BIST For The Diagnosis of Embedded Memory Cores.Davide Appello, Paolo Bernardi, Alessandra Fudoli, Maurizio Rebaudengo, Matteo Sonza Reorda, Vincenzo Tancorre, Massimo Violante
2003CHARDIN: An Off-Chip Transient Current Monitor with Digital Interface for Production Testing.Bartomeu Alorda, Brad Bloechel, Ali Keshavarzi, Jaume Segura
2003Silicon IP And Successful DFM.Robert C. Aitken
2003DFM: The Real 90nm Hurdle.Robert C. Aitken
2003Fault Collapsing via Functional Dominance.Vishwani D. Agrawal, A. V. S. S. Prasad, Madhusudan V. Atre
2003Impedance Profile of a Commercial Power Grid and Test System.Dhruva Acharyya, Jim Plusquellic
2002Embedded Memory Test and Repair: Infrastructure IP for SOC Yield.Yervant Zorian
2002On-Line Testing of Multi-Source Noise-Induced Errors on the Interconnects and Buses of System-on-Chips.Yi Zhao, Li Chen, Sujit Dey
2002A New Method for Testing Jitter Tolerance of SerDes Devices Using Sinusoidal Jitter.Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Hirobumi Musha, Louis Malarsie
2002Multi-GHz interface devices should be tested using external test resources.Takahiro J. Yamaguchi
2002Trouble With Scan.David M. Wu
2002Multiscan-Based Test Compression and Hardware Decompression Using LZ77.Francis G. Wolff, Christos A. Papachristou
2002System Manufacturing Test Cost Model.David Williams, Anthony P. Ambler
2002Test Coverage Models for System Test?David Williams
2002Inevitable Use of TAP Domains in SOCs.Lee Whetsel
2002Open ATE Architecture: Key Challenges.Burnell G. West
2002Implementation of Model-Based Testing for Medium to High-Resolution Nyquist-Rate ADCs.Carsten Wegener, Michael Peter Kennedy
2002What a Device Interface Board Really Costs: An Evaluation of Technical Considerations for Testing Products Operating in the Gigabit Region.Thomas P. Warwick
2002On Testing High-Performance Custom Circuits without Explicit Testing of the Internal Faults.Li-C. Wang, Magdy S. Abadir, Juhong Zhu
2002Generation of Low Power Dissipation and High Fault Coverage Patterns for Scan-Based BIST.Seongmoon Wang
2002Packet-Based Input Test Data Compression Techniques.Erik H. Volkerink, Ajay Khoche, Subhasish Mitra
2002Good Scan = Good Quality Level? Well, It Depends ?Anjali Kinra Vij
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