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IEEE International Test Conference

ITC

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering

Papers indexed

4,920

1981–2025

Papers per year

1981207 peak2025

ITC papers

4,920 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2002Core-Based Scan Architecture for Silicon Debug.Bart Vermeulen, Tom Waayers, Sandeep Kumar Goel
2002EEE 1149.1-Compliant Access Architecture for Multiple Core Debug on Digital System Chips.Bart Vermeulen, Tom Waayers, Sjaak Bakker
2002TAPS All Over My Chips! So Now What Do I Do?Bart Vermeulen
2002Design Rewiring Using ATPG.Andreas G. Veneris, Magdy S. Abadir, Mandana Amiri
2002Isolating and Removing Sources of Variation in Test Data.David Turner, David Abercrombie, James McNames, W. Robert Daasch, Robert Madge
2002Test and Repair of Nonvolatile Commodity and Embedded Memories.Shigeo Tsuchida
2002On-Die DFT Based Solutions are Sufficient for Testing Multi-GHz Interfaces in Manufacturing (and Are Also Key to Enabling Lower Cost ATE Platforms).Mike Tripp
2002FPGA Test and Coverage.Shahin Toutounchi, Andrew Lai
2002A Variable Drivability (VD) Output Buffer for the System In a Package (SIP) and High Frequency Wafer Test.Shigeki Tomishima, Hiroaki Tanizaki, Mitsutaka Niiro, Masanao Maruta, Hideto Hidaka, T. Tada, Kenji Gamo
2002On Identifying Indistinguishable Path Delay Faults and Improving Diagnosis.Ramesh C. Tekumalla, Scott Davidson
2002Signal Integrity Loss in SoC's Interconnects: A Diagnosis Approach Using Embedded Microprocessor.Mohammad H. Tehranipour, Mehrdad Nourani
2002Fault Grading FPGA Interconnect Test Configurations.Mehdi Baradaran Tahoori, Subhasish Mitra, Shahin Toutounchi, Edward J. McCluskey
2002An Embedded Core for Sub-Picosecond Timing Measurements.Sassan Tabatabaei, Andr Ivanov
2002R4X/D4X - Formatters for Flexible Test System Architecture.Ahmed Rashid Syed
2002Complete, Contactless I/O Testing - Reaching the Boundary in Minimizing Digital IC Testing Cost.Stephen K. Sunter, Benoit Nadeau-Dostie
2002IC Mixed-Signal BIST: Separating Facts from Fiction.Stephen K. Sunter
2002BIST-Based Diagnosis of FPGA Interconnect.Charles E. Stroud, Jeremy Nall, Matthew Lashinsky, Miron Abramovici
2002An Implementation of IEEE 1149.1 to Avoid Timing Violations and Other Practical In-Compliance Improvements.Dave Stang, Ramaswami Dandapani
2002A New Test Generation Approach for Embedded Analogue Cores in SoC.M. Stancic, Liquan Fang, M. H. H. Weusthof, R. M. W. Tijink, Hans G. Kerkhoff
2002Homegrown Tools and Equipment versus EDA and ATE Vendors: The Future of Design to Test Product Lines.Gregory S. Spirakis
2002Mixed Signal BIST: Fact or Fiction.Lee Y. Song
2002A Wavelet-Based Timing Parameter Extraction Method.Mani Soma, Welela Haileselassie, Jessica Yan, Rajesh Raina
2002Testing Highly Integrated Wireless Circuits and Systems with Low Cost Tester: How to Overcome the Challenge?Mustapha Slamani
2002Efficient Embedded Memory Testing with APG.A. T. Sivaram, Daniel Fan, A. Yiin
2002DUT Capture Using Simultaneous Logic Acquisition.A. T. Sivaram, William Fritzsche, Toshitaka Koshi, Nam Lai
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