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IEEE International Test Conference

ITC

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering

Papers indexed

4,920

1981–2025

Papers per year

1981207 peak2025

ITC papers

4,920 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2002Wafer/Package Test Mix for Optimal Defect Detection.Peter C. Maxwell
2002The Heisenberg Uncertainty of Test.Peter C. Maxwell
2002Considerations for STIL Data Application.Gregory A. Maston
2002A Set of Benchmarks fo Modular Testing of SOCs.Erik Jan Marinissen, Vikram Iyengar, Krishnendu Chakrabarty
2002High Current DPS Architecture for Sort Test Challenge.Jean-Pascal Mallet
2002A Multi-Language Goal-Tree Based Functional Test Planning System.Rajneesh Mahajan, Ramesh Govindarajulu, James R. Armstrong, F. Gail Gray
2002Screening MinVDD Outliers Using Feed-Forward Voltage Testing.Robert Madge, B. H. Goh, V. Rajagopalan, C. Macchietto, W. Robert Daasch, Chris Schuermyer, C. Taylor, David Turner
2002Testing Wireless Local Area Network Transceiver ICs at 5 GHz.Kevin M. MacKay
2002Panel: "Board Test and ITC: What Does the Future Hold?".Monica Lobetti Bodoni
2002On the Accuracy of Jitter Separation from Bit Error Rate Function.Mike Peng Li, Jan B. Wilstrup
2002Incremental Diagnosis of Multiple Open-Interconnects.Jiang Brandon Liu, Andreas G. Veneris, Hiroshi Takahashi
2002Techniques to Reduce Data Volume and Application Time for Transition Test.Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran
2002Support for Debugging in the Alpha 21364 Microprocessor.Timothe Litt
2002Analysis of Delay Test Effectiveness with a Multiple-Clock Scheme.Jing-Jia Liou, Li-C. Wang, Kwang-Ting Cheng, Jennifer Dworak, M. Ray Mercer, Rohit Kapur, Thomas W. Williams
2002Multiplets, Models, and the Search for Meaning: Improving Per-Test Fault Diagnosis.David B. Lavo, Ismed Hartanto, Tracy Larrabee
2002Comparison of IDDQ Testing and Very-Low Voltage Testing.Bram Kruseman, Stefan van den Oetelaar, Josep Rius
2002Improved Digital I/O Ports Enhance Testability of Interconnections.Adam Kristof
2002Reducing Test Dat Volume Using LFSR Reseeding with Seed Compression.C. V. Krishna, Nur A. Touba
2002Test Setup Simulation - A High-Performance VHDL-Based Virtual Test Solution Meeting Industrial Requirements.Gunter Krampl, Marco Rona, Hermann Tauber
2002On the Use of k-tuples for SoC Test Schedule Representation.Sandeep Koranne, Vikram Iyengar
2002Challenges and Solutions for Multi-Gigahertz Testing.David C. Keezer
2002Low-Contact-Force Probing on Copper Electrodes.Kenichi Kataoka, Toshihiro Itoh, Katsuya Okumura, Tadatomo Suga
2002Homegrown Tools and Equipment versus EDA and ATE Vendors: The Future of Design to Test Product Lines.Bozena Kaminska
2002Wireless SOC Testing: Can RF Testing Costs Be Reduced?Alan Kafton
2002The Manic Depression of Microprocessor Debug.Don Douglas Josephson
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