| 2002 | A Parallel and Accelerated Circuit Simulator with Precise Accuracy. | Peter M. Lee, Shinji Ito, Takeaki Hashimoto, Junji Sato, Tomomasa Touma, Goichi Yokomizo |
| 2002 | Specification, Modeling and Design Tools for System-on-Chip (Tutorial Abstract). | Luciano Lavagno, Sujit Dey, Rajesh K. Gupta |
| 2002 | MEMS: Technology, Design, CAD and Applications (Tutorial Abstract). | R. Lal, P. R. Apte, K. N. Bhat, G. Bose, S. Chandra, D. K. Sharma |
| 2002 | Embedded Tutorial: Battery-Driven System Design: A New Frontier in Low Power Design. | Kanishka Lahiri, Anand Raghunathan, Sujit Dey, Debashis Panigrahi |
| 2002 | Leakage Power Estimation for Deep Submicron Circuits in an ASIC Design Environment. | Rahul Kumar, C. P. Ravikumar |
| 2002 | Explicit Expression and Simultaneous Optimization of Placement and Routing for Analog IC Layouts. | Yukiko Kubo, Shigetoshi Nakatake, Yoji Kajitani, Masahiro Kawakita |
| 2002 | On Test Scheduling for Core-Based SOCs. | Sandeep Koranne |
| 2002 | Embedded Tutorial: General Architectural Concepts for IP Core Re-Use. | P. Klapproth |
| 2002 | Modeling of Multi-Layered Power Distribution Planes Including Via Effects Using Transmission Matrix Method. | Joong-Ho Kim, Erdem Matoglu, Jinwoo Choi, Madhavan Swaminathan |
| 2002 | Multiple Faults: Modeling, Simulation and Test. | Yong Chang Kim, Vishwani D. Agrawal, Kewal K. Saluja |
| 2002 | Topological Analysis for Leakage Prediction of Digital Circuits. | Wenjie Jiang, Vivek Tiwari, Erik de la Iglesia, Amit Sinha |
| 2002 | An Architectural Level Energy Reduction Technique For Deep-Submicron Cache Memories. | Tohru Ishihara, Kunihiro Asada |
| 2002 | System-Level Point-to-Point Communication Synthesis using Floorplanning Information. | Jingcao Hu, Yangdong Deng, Radu Marculescu |
| 2002 | Constraint Driven Pin Mapping for Concurrent SOC Testing. | Yu Huang, Nilanjan Mukherjee, Chien-Chung Tsai, Omer Samman, Yahya Zaidan, Yanping Zhang, Wu-Tung Cheng, Sudhakar M. Reddy |
| 2002 | Interconnect Energy Dissipation in High-Speed ULSI Circuits. | Payam Heydari, Massoud Pedram |
| 2002 | SWASAD: An ASIC Design for High Speed DNA Sequence Matching. | Tony Han, Sri Parameswaran |
| 2002 | Property-Specific Testbench Generation for Guided Simulation. | Aarti Gupta, Albert E. Casavant, Pranav Ashar, Sean Liu, Akira Mukaiyama, Kazutoshi Wakabayashi |
| 2002 | Design for Verification at the Register Transfer Level. | Indradeep Ghosh, Krishna Sekar, Vamsi Boppana |
| 2002 | Electronic Industry on Fire: How to Survive and Thrive. | Aart J. de Geus |
| 2002 | Design of an On-Chip Test Pattern Generator without Prohibited Pattern Set (PPS). | Niloy Ganguly, Biplab K. Sikdar, Parimal Pal Chaudhuri |
| 2002 | Improved SAT-Based Bounded Reachability Analysis. | Malay K. Ganai, Adnan Aziz |
| 2002 | Functional Partitioning for Low Power Distributed Systems of Systems-on-a-Chip. | Yunsi Fei, Niraj K. Jha |
| 2002 | A 3-D Minimum-Order Boundary Integral Equation Technique to Extract Frequency-Dependant Inductance and Resistance in ULSI. | Shuzhou Fang, Zeyi Wang, Xianlong Hong |
| 2002 | Evaluating Run-Time Techniques for Leakage Power Reduction. | David Duarte, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mary Jane Irwin |
| 2002 | Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories. | Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam, Ibrahim Kolcu |