| 2009 | Simultaneous Peak Temperature and Average Power Minimization during Behavioral Synthesis. | Vyas Krishnan, Srinivas Katkoori |
| 2009 | A 2.4Gbps-4.8Gbps XDR-DRAM I/O (XIO) Link. | Vijay Khawshe, Kapil Vyas, Renu Rangnekar, Prateek Goyal, Vijay Krishna, Kashinath Prabhu, Pravin Kumar Venkatesan, Leneesh Raghavan, Rajkumar Palwai, M. Thrivikraman, Kunal Desai, Abhijit Abhyankar |
| 2009 | A Workbench for Analytical and Simulation Based Design Space Exploration of Software Defined Radios. | Torsten Kempf, Stefan Wallentowitz, Gerd Ascheid, Rainer Leupers, Heinrich Meyr |
| 2009 | Metric Based Multi-Timescale Control for Reducing Power in Embedded Systems. | Nitin Kataria, Forrest Brewer, Joo Pedro Hespanha, Timothy Sherwood |
| 2009 | Made for India Forum. | Rajiv Kapur |
| 2009 | Code Transformations for TLB Power Reduction. | Reiley Jeyapaul, Sandeep Marathe, Aviral Shrivastava |
| 2009 | Temperature Aware Scheduling for Embedded Processors. | Ramkumar Jayaseelan, Tulika Mitra |
| 2009 | Efficient Implementation of Floating-Point Reciprocator on FPGA. | Manish Kumar Jaiswal, Nitin Chandrachoodan |
| 2009 | Efficient Grouping of Fail Chips for Volume Yield Diagnostics. | Lavanya Jagan, Ratan Deep Singh, V. Kamakoti, Ananta K. Majhi |
| 2009 | Security and Dependability of Embedded Systems: A Computer Architects' Perspective. | Jrg Henkel, Vijaykrishnan Narayanan, Sri Parameswaran, Roshan G. Ragel |
| 2009 | Inline Assertions - Embedding Formal Properties in a Test Bench. | Aritra Hazra, Priyankar Ghosh, Pallab Dasgupta, Partha Pratim Chakrabarti |
| 2009 | Improved-Quality Real-Time Stereo Vision Processor. | Sang-Kyo Han, SeongHoon Woo, Mun-Ho Jeong, Bum-Jae You |
| 2009 | An ILP Based ATPG Technique for Multiple Aggressor Crosstalk Faults Considering the Effects of Gate Delays. | Kunal P. Ganeshpure, Sandip Kundu |
| 2009 | A 7T/14T Dependable SRAM and its Array Structure to Avoid Half Selection. | Hidehiro Fujiwara, Shunsuke Okumura, Yusuke Iguchi, Hiroki Noguchi, Hiroshi Kawaguchi, Masahiko Yoshimoto |
| 2009 | A New Hardware Routing Accelerator for Multi-Terminal Nets. | Kaleem Fatima, Rameshwar Rao |
| 2009 | Specification Driven Design of Phase Locked Loops. | Prakash Easwaran, Prasenjit Bhowmik, Rupak Ghayal |
| 2009 | A Low Power Architecture to Extend the Tuning Range of a Quadrature Clock. | Ramen Dutta, T. K. Bhattacharyya |
| 2009 | Measurement and Analysis of Parasitic Capacitance in FinFETs with High-k Dielectrics and Metal-Gate Stack. | Abhisek Dixit, Anirban Bandhyopadhyay, Nadine Collaert, Kristin De Meyer, Malgorzata Jurczak |
| 2009 | Making Sense Out of the Potential Babble of Low Power Standards. | Gary Delp |
| 2009 | Design for Manufacturability and Reliability in Nano Era. | Goutam Debnath, Paul J. Thadikaran |
| 2009 | Fuzzy Logic Based Guidance to Graph Grammar Framework for Automated Analog Circuit Design. | Angan Das, Ranga Vemuri |
| 2009 | Switched-Capacitor Based Buck Converter Design Using Current Limiter for Better Efficiency and Output Ripple. | Tamal Das, Pradip Mandal |
| 2009 | Common Power Format: A User-driven Ecosystem For Proven Low Power Design Flows. | Sumit DasGupta |
| 2009 | Analysis of the Energy Quantization Effects on Single Electron Inverter Performance through Noise Margin Modeling. | Surya Shankar Dan, Santanu Mahapatra |
| 2009 | TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis. | Alejandro Czutro, Ilia Polian, Matthew Lewis, Piet Engelke, Sudhakar M. Reddy, Bernd Becker |