| 2008 | A Robust Level-Shifter Design for Adaptive Voltage Scaling. | Ankur Gupta, Rajat Chauhan, Vinod Menezes, Vikas Narang, H. M. Roopashree |
| 2008 | Power Management of Interactive 3D Games Using Frame Structures. | Yan Gu, Samarjit Chakraborty |
| 2008 | Design Automation Standards: The IP Providers Perspective. | John Goodenough |
| 2008 | On-Chip Process Variation Detection Using Slew-Rate Monitoring Circuit. | Amlan Ghosh, Rahul M. Rao, Jae-Joon Kim, Ching-Te Chuang, Richard B. Brown |
| 2008 | A New Approach for Estimation of On-Resistance and Current Distribution in Power Array Layouts. | Jyotirmoy Ghosh, Siddhartha Mukhopadhyay, Amit Patra, Barry Culpepper, Tawen Mei |
| 2008 | Highly Linear Wide Dynamic Swing CMOS Transconductance Multiplier Using Source-Degeneration V-I Converters. | Sri Raga Sudha Garimella |
| 2008 | Energy-Efficient Soft-Error Protection Using Operand Encoding and Operation Bypass. | Kaushal R. Gandhi, Nihar R. Mahapatra |
| 2008 | An Elitist Non-Dominated Sorting Based Genetic Algorithm for Simultaneous Area and Wirelength Minimization in VLSI Floorplanning. | Pradeep Fernando, Srinivas Katkoori |
| 2008 | Fault Tolerant Dynamic Antenna Array in Smart Antenna System Using Evolved Virtual Reconfigurable Circuit. | D. Dhanasekaran, K. Boopathy Bagan |
| 2008 | An Approach to Software Performance Evaluation on Customized Embedded Processors. | Soumyajit Dey, Monu Kedia, Anupam Basu |
| 2008 | A Partitioning Based Physical Scan Chain Allocation Algorithm that Minimizes Voltage Domain Crossings. | Nilabha Dev, Sandeep Bhatia, Subhasish Mukherjee, Sue Genova, Vinayak Kadam |
| 2008 | Formal Verification of a Public-Domain DDR2 Controller Design. | Abhishek Datta, Vigyan Singhal |
| 2008 | An Inversion-Based Synthesis Approach for Area and Power Efficient Arithmetic Sum-of-Products. | Sabyasachi Das, Sunil P. Khatri |
| 2008 | A Timing-Driven Synthesis Technique for Arithmetic Product-of-Sum Expressions. | Sabyasachi Das, Sunil P. Khatri |
| 2008 | A Merged Synthesis Technique for Fast Arithmetic Blocks Involving Sum-of-Products and Shifters. | Sabyasachi Das, Sunil P. Khatri |
| 2008 | Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations. | Bishnu Prasad Das, Janakiraman Viraraghavan, Bharadwaj Amrutur, H. S. Jamadagni, N. V. Arvind |
| 2008 | Compact Modeling of Suspended Gate FET. | Yogesh Singh Chauhan, Dimitrios Tsamados, Nicolas Abel, Christoph Eggimann, Michel J. Declercq, Adrian M. Ionescu |
| 2008 | Driving Analog Mixed Signal Verification through Verilog-AMS. | Sri Chandra |
| 2008 | Programming and Performance Modelling of Automotive ECU Networks. | Samarjit Chakraborty, S. Ramesh |
| 2008 | Analysis and Robust Design of Diode-Resistor Based Nanoscale Crossbar PLA Circuits. | Rajat Subhra Chakraborty, Somnath Paul, Swarup Bhunia |
| 2008 | IEEE Market-Oriented Standards Process and the EDA Industry. | Dennis Brophy |
| 2008 | Implementing the Best Processor Cores. | Vamsi Boppana, Rahoul Varma, S. Balajee |
| 2008 | A Novel Approach to Design BCD Adder and Carry Skip BCD Adder. | Ashis Kumer Biswas, Md. Mahmudul Hasan, Moshaddek Hasan, Ahsan Raja Chowdhury, Hafiz Md. Hasan Babu |
| 2008 | A Low Voltage, Low Ripple, on Chip, Dual Switch-Capacitor Based Hybrid DC-DC Converter. | Kaushik Bhattacharyya, Pradip Mandal |
| 2008 | Behavioral Modeling of a CMOS Compatible High Precision MEMS Based Electron Tunneling Accelerometer. | T. K. Bhattacharyya, Anandaroop Ghosh |