| 2008 | An Optimal Multi-Functional Unit Dynamic Instruction Selection Logic at Submicron Technologies. | Terrell R. Bennett, Rama Sangireddy |
| 2008 | Mismatch Aware Analog Performance Macromodeling Using Spline Center and Range Regression on Adaptive Samples. | Shubhankar Basu, Balaji Kommineni, Ranga Vemuri |
| 2008 | Optimal Dual-VT Design in Sub-100 Nanometer PDSOI and Double-Gate Technologies. | Aditya Bansal, Jae-Joon Kim, Keunwoo Kim, Saibal Mukhopadhyay, Ching-Te Chuang, Kaushik Roy |
| 2008 | Integrated TIA-Equalizer for High Speed Optical Link. | Saurav Bandyopadhyay, Pradip Mandal, Stephen E. Ralph, Kenneth Pedrotti |
| 2008 | 0.35, 1 GHz, CMOS Timing Generator Using Array of Digital Delay Lock Loops. | Balaji Srinivasan, Vinay Bhaskar Chandratre, Menka Tewani |
| 2008 | Low Power Hardware Architecture for VBSME Using Pixel Truncation. | Asral Bahari, Tughrul Arslan, Ahmet T. Erdogan |
| 2008 | Reconfiguring CMOS as Pseudo N/PMOS for Defect Tolerance in Nano-Scale CMOS. | Maryam Ashouei, Adit D. Singh, Abhijit Chatterjee |
| 2008 | Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip. | Alexandru Andrei, Petru Eles, Zebo Peng, Jakob Rosen |
| 2008 | A Power Efficient Approach to Fault-Tolerant Register File Design. | Mojtaba Amiri-Kamalabad, Seyed Ghassem Miremadi, Mahdi Fazeli |
| 2008 | Single Chip Encryptor/Decryptor Core Implementation of AES Algorithm. | Monjur Alam, Santosh Ghosh, Dipanwita Roy Chowdhury, Indranil Sengupta |
| 2008 | Self-Sleep Buffer for Distributed MTCMOS Design. | Charbel J. Akl, Magdy A. Bayoumi |
| 2008 | Wiring-Area Efficient Simultaneous Bidirectional Point-to-Point Link for Inter-Block On-Chip Signaling. | Charbel J. Akl, Magdy A. Bayoumi |
| 2008 | Addressing the Challenges of Synchronization/Communication and Debugging Support in Hardware/Software Cosimulation. | Banit Agrawal, Timothy Sherwood, Chulho Shin, Simon Yoon |
| 2008 | Energy-Efficient, High Performance Circuits for Arithmetic Units. | Sundeepkumar Agarwal, Pavankumar V. K., Yokesh R. |
| 2007 | On-Chip Voltage Down Converter Based on Moderate Inversion for Low- Power VLSI Chips. | Qianneng Zhou, Fengchang Lai, Yongsheng Wang |
| 2007 | Interpreting and Extending an Analytical Battery Model Using an Iterative Computation Method. | Nenggan Zheng, Zhaohui Wu, Man Lin, Qijia Wang |
| 2007 | Spectral RTL Test Generation for Microprocessors. | Nitin Yogi, Vishwani D. Agrawal |
| 2007 | Compiler-Directed Code Restructuring for Operating with Compressed Arrays. | Taylan Yemliha, Guangyu Chen, Ozcan Ozturk, Mahmut T. Kandemir, Vijay Degalahal |
| 2007 | On NBTI Degradation Process in Digital Logic Circuits. | Xiangning Yang, Eric F. Weglarz, Kewal K. Saluja |
| 2007 | Efficient Symbolic Sensitivity based Parasitic-Inclusive Optimization in Layout Aware Analog Circuit Synthesis. | Huiying Yang, Ranga Vemuri |
| 2007 | Timing-Constrained Yield-Driven Wiring Reconstruction for Critical Area Minimization. | Jin-Tai Yan, Bo-Yi Chiang |
| 2007 | Modified Stability Checking for On-line Error Detection. | Satish Yada, Bharadwaj S. Amrutur, Rubin A. Parekhji |
| 2007 | Delay Test Scan Flip-Flop: DFT for High Coverage Delay Testing. | Gefu Xu, Adit D. Singh |
| 2007 | Locality-Aware Distributed Loop Scheduling for Chip Multiprocessors. | Liping Xue, Mahmut T. Kandemir, Guilin Chen, Feihui Li, Ozcan Ozturk, Rajaraman Ramanarayanan, Balaji Vaidyanathan |
| 2007 | Defect-Aware Synthesis of Droplet-Based Microfluidic Biochips. | Tao Xu, Krishnendu Chakrabarty, Fei Su |