| 2008 | Enhanced TED: A New Data Structure for RTL Verification. | Pejman Lotfi-Kamran, Mehran Massoumi, Mohammad Mirzaei, Zainalabedin Navabi |
| 2008 | Efficient Linear Macromodeling via Discrete-Time Time-Domain Vector Fitting. | Chi-Un Lei, Ngai Wong |
| 2008 | OpenSPARC - A Scalable Chip Multi-Threading Design. | Dwayne Lee |
| 2008 | Energy-Aware Interconnect Optimization for a Coarse Grained Reconfigurable Processor. | Andy Lambrechts, Praveen Raghavan, Murali Jayapala, Francky Catthoor, Diederik Verkest |
| 2008 | Cross-Layer Approaches to Designing Reliable Systems Using Unreliable Chips. | Fadi J. Kurdahi, Nikil D. Dutt, Ahmed M. Eltawil, Sani R. Nassif |
| 2008 | A Fast Settling 100dB OPAMP in 180nm CMOS Process with Compensation Based Optimisation. | Amal Kumar Kundu, Subho Chatterjee, Tarun Kanti Bhattacharyya |
| 2008 | Gateway to Chips: High Speed I/O Signalling and Interface. | Nidhir Kumar, Senthil N. Velu, Rajan Verma |
| 2008 | Memory Architecture Exploration Framework for Cache Based Embedded SOC. | T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindarajan |
| 2008 | Clock Period Minimization with Iterative Binding Based on Stochastic Wirelength Estimation during High-Level Synthesis. | Vyas Krishnan, Srinivas Katkoori |
| 2008 | High-Level Modeling Approach for Analyzing the Effects of Traffic Models on Power and Throughput in Mesh-Based NoCs. | Somayyeh Koohi, Mohammad Mirza-Aghatabar, Shaahin Hessabi, Massoud Pedram |
| 2008 | Memory Yield Improvement through Multiple Test Sequences and Application-Aware Fault Models. | Aman Kokrady, C. P. Ravikumar, Nitin Chandrachoodan |
| 2008 | A Modeling of a Dynamically Reconfigurable Processor Using SystemC. | Junji Kitamichi, Koji Ueda, Kenichi Kuroda |
| 2008 | Architecture Exploration for Low Power Design. | Vinod Kathail, Tom Miller |
| 2008 | Temperature and Process Variations Aware Power Gating of Functional Units. | Deepa Kannan, Aviral Shrivastava, Vipin Mohan, Sarvesh Bhardwaj, Sarma B. K. Vrudhula |
| 2008 | Power Reduction of Functional Units Considering Temperature and Process Variations. | Deepa Kannan, Aviral Shrivastava, Sarvesh Bhardwaj, Sarma B. K. Vrudhula |
| 2008 | Unified Vdd - Vth Optimization Based DVFM Controller for a Logic Block. | S. A. Kannan, N. S. Sreeram, Bharadwaj S. Amrutur |
| 2008 | PTSMT: A Tool for Cross-Level Power, Performance, and Thermal Exploration of SMT Processors. | Deepa Kannan, Aseem Gupta, Aviral Shrivastava, Nikil D. Dutt, Fadi J. Kurdahi |
| 2008 | Exploiting Variable Cycle Transmission for Energy-Efficient On-Chip Interconnect Design. | T. Venkata Kalyan, Madhu Mutyam, Vijaya Sankara Rao Pasupureddi |
| 2008 | Continuous Frequency Adjustment Technique Based on Dynamic Workload Prediction. | Hwisung Jung, Massoud Pedram |
| 2008 | MoCSYS: A Multi-Clock Hybrid Two-Layer Router Architecture and Integrated Topology Synthesis Framework for System-Level Design of FPGA Based On-Chip Networks. | Arun Janarthanan, Karen A. Tomko |
| 2008 | GyroCompiler: A Soft IP Model Synthesis and Analysis Framework for Design of MEMS Based Gyroscopes. | Sukumar Jairam, Navakanta Bhat |
| 2008 | A Scalable and Reconfigurable Coprocessor for Image Composition. | Jalaj Jain |
| 2008 | A Robust Architecture for Flip-Flops Tolerant to Soft-Errors and Transients from Combinational Circuits. | Aditya Jagirdar, Roystein Oliveira, Tapan J. Chakraborty |
| 2008 | Energy Reduction in SRAM using Dynamic Voltage and Frequency Management. | Mohammed Shareef I, Pradeep Nair, Bharadwaj Amrutur |
| 2008 | Watermarking Video Clips with Workload Information for DVS. | Yicheng Huang, Samarjit Chakraborty, Ye Wang |