| 2006 | Handling Constraints in Multi-Objective GA for Embedded System Design. | Biman Chakraborty, Ting Chen, Tulika Mitra, Abhik Roychoudhury |
| 2006 | A Progressive Two-Stage Global Routing for Macro-Cell Based Designs. | Alkan Cengiz, Tom W. Chen |
| 2006 | A 3Gb/s/wire Global On-Chip Bus with Near Velocity-of-Light Latency. | Peter Caputa, Christer Svensson |
| 2006 | Performance and Energy Benefits of Instruction Set Extensions in an FPGA Soft Core. | Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Paolo Ienne, Laura Pozzi |
| 2006 | Development of a Wireless Integrated Toxic and Explosive MEMS Based Gas Sensor. | T. K. Bhattacharyya, Shreyas Sen, Debashis Mandal, S. K. Lahiri |
| 2006 | Real Time Dynamic Receive Apodization for an Ultrasound Imaging System. | J. Bhattacharyya, P. Mandal, R. Banerjee, Swapna Banerjee |
| 2006 | Efficient DNA Sensing with Fabricated Silicon Nanopores: Diagnosis Methodology and Algorithms. | Soumendu Bhattacharya, Vishwanath Natarajan, Abhijit Chatterjee, Sankar Nair |
| 2006 | Extrinsic Analog Synthesis Using Piecewise Linear Current-Mode Circuits. | M. S. Bhat, S. Rekha, H. S. Jamadagni |
| 2006 | Parasitic Aware Routing Methodology Based on Higher Order RLCK Moment Metrics. | Amitava Bhaduri, Ranga Vemuri |
| 2006 | Semi-Custom Design of Adiabatic Adder Circuits. | V. S. Kanchana Bhaaskaran, S. Salivahanan, D. S. Emmanuel |
| 2006 | A Statistical Method for Fast and Accurate Capacitance Extraction in the Presence of Floating Dummy Fills. | Shabbir H. Batterywala, Rohit Ananthakrishna, Yansheng Luo, Alex Gyure |
| 2006 | A Low Power 1.8 V 4-Bit 400-MHz Flash ADC in 0.18 Digital CMOS. | Subhadeep Banik, Daibashish Gangopadhyay, T. K. Bhattacharyya |
| 2006 | An Efficient Scan Tree Design for Compact Test Pattern Set. | Shibaji Banerjee, Dipanwita Roy Chowdhury, Bhargab B. Bhattacharya |
| 2006 | Deterministic Low-Latency Data Transfer across Non-Integral Ratio Clock Domains. | Suresh Balasubramanian, Narayanan Natarajan, Olivier Franza, Chris Gianos |
| 2006 | PIDISC: Pattern Independent Design Independent Seed Compression Technique. | Kedarnath J. Balakrishnan, Seongmoon Wang, Srimat T. Chakradhar |
| 2006 | Test Cost Reduction Using Partitioned Grid Random Access Scan. | Dong Hyun Baik, Kewal K. Saluja |
| 2006 | Statistical Estimation of Correlated Leakage Power Variation and Its Application to Leakage-Aware Design. | Maryam Ashouei, Abhijit Chatterjee, Adit D. Singh, Vivek De, T. M. Mak |
| 2006 | UNUM: A Tinker-Toy Approach to Building Multicore PowerPC Microarchitectures. | Arvind |
| 2006 | MoM - A Process Variation Aware Statistical Capacitance Extractor. | Rohit Ananthakrishna, Shabbir H. Batterywala |
| 2006 | Clockless Pipelining for Coarse Grain Datapaths. | Abdelhalim Alsharqawi, Abdel Ejnioui |
| 2006 | Improving the Performance of CAD Optimization Algorithms Using On-Line Meta-Level Control. | Sandip Aine, P. P. Chakrabarti, Rajeev Kumar |
| 2006 | DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield. | David Abercrombie, Bernd Koenemann, Nagesh Tamarapalli, Srikanth Venkataraman |
| 2005 | Optimizing SoC Manufacturability. | Yervant Zorian |
| 2005 | On Finding Consecutive Test Vectors in a Random Sequence for Energy-Aware BIST Design. | Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattacharya |
| 2005 | Synthesis of Majority and Minority Networks and Its Applications to QCA, TPL and SET Based Nanotechnologies. | Rui Zhang, Pallav Gupta, Niraj K. Jha |