| 2006 | Novel Architecture of EBC for JPEG2000. | Anand Gautam, A. Geeta Madhuri, Priya Khandelwal, K. Pratyush Aditya, Meghana Desai, Padma N. Krishna, Malvika Dutt, Reeti Bhatia |
| 2006 | An Area and Configuration-Bit Optimized CLB Architecture and Timing-Driven Packing for FPGAs. | Vivek Garg, Vikram Chandrasekhar, Milagros Sashiknth, V. Kamakoti |
| 2006 | Heterogeneous Floorplanning for FPGAs. | Yan Feng, Dinesh P. Mehta |
| 2006 | Exceptional ASIC: Through Automatic Timing Exception Generation (ATEG). | Siva Embanath, Ramakrishnan Venkata |
| 2006 | Design of Low-Voltage Low-Power Continuous-Time Filter for Hearing Aid Application Using CMOS Current Conveyor Based Translinear Loop. | Debashis Dutta, Ritesh Ujjwal, Swapna Banerjee |
| 2006 | An Integrated Approach for Combining BDD and SAT Provers. | Rolf Drechsler, Grschwin Fey, Sebastian Kinder |
| 2006 | A Wideband Frequency-Shift Keying Demodulator for Wireless Neural Stimulation Microsystems. | Mian Dong, Chun Zhang, Songping Mai, Zhihua Wang, Dongmei Li |
| 2006 | Efficient Analog Performance Macromodeling via Sequential Design Space Decomposition. | Mengmeng Ding, Ranga Vemuri |
| 2006 | An Approach to Architectural Enhancement for Embedded Speech Applications. | Soumyajit Dey, Susmit Biswas, Arijit Mukhopadhyay, Anupam Basu |
| 2006 | An 8-Bit, 3.8GHz Dynamic BiCMOS Comparator for High-Performance ADC. | Sanjoy Kumar Dey, Swapna Banerjee |
| 2006 | Sequential Spectral ATPG Using the Wavelet Transform and Compaction. | Suresh Kumar Devanathan, Michael L. Bushnell |
| 2006 | A Low Power 6-Bit A/D Converter Achieving 10-Bit Resolution for MEMS Sensor Interface Using Time-Interleaved Delta Modulation. | Koushik De, Santiram Kal |
| 2006 | Design Challenges for High Performance Nano-Technology. | Goutam Debnath, Paul J. Thadikaran |
| 2006 | Design of Multi-bit SET Adder and Its Fault Simulation. | Deepanjan Datta, Samiran Ganguly |
| 2006 | A New Device Level Digital Simulator for Simulation and Functional Verification of Large Semiconductor Memories. | Tathagato Rai Dastidar, Partha Ray |
| 2006 | High Performance MTCMOS Technique for Leakage Reduction in Hybrid SOI-Epitaxial Technologies with Enhanced-Mobility PFET Header. | Koushik K. Das, Shih-Hsien Lo, Ching-Te Chuang |
| 2006 | Linear Required-Arrival-Time Trees and their Construction. | Parthasarathi Dasgupta, Prashant Yadava |
| 2006 | Instruction-Set-Extension Exploration Using Decomposable Heuristic Search. | Samik Das, P. P. Chakrabarti, Pallab Dasgupta |
| 2006 | A New Approach to Synthesize Multiple-Output Functions Using Reversible Programmable Logic Array. | Ahsan Raja Chowdhury, Rumana Nazmul, Hafiz Md. Hasan Babu |
| 2006 | New Procedures to Identify Redundant Stuck-At Faults and Removal of Redundant Logic. | Gang Chen, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski |
| 2006 | A Low Power ROM-Less Direct Digital Frequency Synthesizer with Preset Value Pipelined Accumulator. | Jun Chen, Rong Luo, Huazhong Yang, Hui Wang |
| 2006 | Analog Macromodeling for Combined Resistive Vias, Resistive Bridges, and Capacitive Crosstalk Delay Faults. | Shweta Chary, Michael L. Bushnell |
| 2006 | Automatic Path-Delay Fault Test Generation for Combined Resistive Vias, Resistive Bridges, and Capacitive Crosstalk Delay Faults. | Shweta Chary, Michael L. Bushnell |
| 2006 | An Alternative Real-Time Filter Scheme to Block Buffering. | Yen-Jen Chang |
| 2006 | Symbolic Time-Domain Behavioral and Performance Modeling of Linear Analog Circuits Using an Efficient Symbolic Newton-Iteration Algorithm for Pole Extraction. | Ritochit Chakraborty, Mukesh Ranjan, Ranga Vemuri |