| 2005 | Rapid Embedded Hardware/Software System Generation. | Jorgen Peddersen, Seng Lin Shee, Andhi Janapsatya, Sri Parameswaran |
| 2005 | Design of Second-Order Sub-Bandgap Mixed-Mode Voltage Reference Circuit for Low Voltage Applications. | Rajarshi Paul, Amit Patra, Shailendra Baranwal, Kaushik Dash |
| 2005 | ABCD Modeling of Crosstalk Coupling Noise to Analyze the Signal Integrity Losses on the Victim Interconnect in DSM Chips. | Ajoy Kumar Palit, Volker Meyer, Walter Anheier, Jrgen Schlffel |
| 2005 | A Relative Comparative Based Datapath for Increasing Resolution in a Capacitive Fingerprint Sensor Chip. | Mukul Milind Ojha, Arun Kumar Anand, G. S. Visweswaran, D. Nagchoudhuri |
| 2005 | System in a Package Design of a RF Front End System Using Application Specific Reduced Order Models. | Ghanshyam Nayak, Clyde Washburn, P. R. Mukund |
| 2005 | ESL - The Next Leadership Opportunity for India? | Alan Naumann |
| 2005 | A Low-Swing Differential Signaling Scheme for On-Chip Global Interconnects. | Ashok Narasimhan, Manish Kasotiya, Ramalingam Sridhar |
| 2005 | A Low-Power Current-Mode Clock Distribution Scheme for Multi-GHz NoC-Based SoCs. | Ashok Narasimhan, Shantanu Divekar, Praveen Elakkumanan, Ramalingam Sridhar |
| 2005 | Application of Douglas-Peucker Algorithm to Generate Compact but Accurate IBIS Models. | G. N. Nandakumar, Nirav Patel, Raghunatha Reddy, Makeshwar Kothandaraman |
| 2005 | The Impact of Inductance on Transients Affecting Gate Oxide Reliability. | N. S. Nagaraj, William R. Hunter, Poras T. Balsara, Cyrus D. Cantrell |
| 2005 | Improved Layout-Driven Area-Constrained Timing Optimization by Net Buffering. | Rajeev Murgai |
| 2005 | An Efficient End to End Design of Rijndael Cryptosystem in 0.18 ? CMOS. | Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury |
| 2005 | Physics and Technology: Towards Low-Power DSM Design. | D. Mukhopadhyay, P. K. Basu, V. Ramgopal Rao |
| 2005 | On Physical-Aware Synthesis of Vertically Integrated 3D Systems. | Madhubanti Mukherjee, Ranga Vemuri |
| 2005 | A Low Power Reprogrammable Parallel Processing VLSI Architecture for Computation of B-Spline Based Medical Image Processing System for Fast Characterization of Tiny Objects Suspended in Cellular Fluid. | Sabyasachi Mondal, Arijit De, P. K. Biswas |
| 2005 | Design of a Low Power Image Watermarking Encoder Using Dual Voltage and Frequency. | Saraju P. Mohanty, N. Ranganathan, Karthikeyan Balakrishnan |
| 2005 | Structural Fault Diagnosis in Charge-Pump Based Phase-Locked Loops. | Aditya Sankar Medury, Ingvar Carlson, Atila Alvandpour, John Stensby |
| 2005 | Placement and Routing for 3D-FPGAs Using Reinforcement Learning and Support Vector Machines. | R. Manimegalai, E. Siva Soumya, Vaishnavi Muralidharan, Balaraman Ravindran, V. Kamakoti, Dinesh Bhatia |
| 2005 | Hot Spots and Zones in a Chip: A Geometrician's View. | Subhashis Majumder, Susmita Sur-Kolay, Subhas C. Nandy, Bhargab B. Bhattacharya, B. Chakraborty |
| 2005 | On-Chip Voltage Regulator with Improved Transient Response. | Ashis Maity, R. G. Raghavendra, Pradip Mandal |
| 2005 | Evaluation of Device Parameters of HfO2/SiO2/Si Gate Dielectric Stack for MOSFETs. | A. Madan, S. C. Bose, P. J. George, Chandra Shekhar |
| 2005 | Distance Restricted Scan Chain Reordering to Enhance Delay Fault Coverage. | Wei Li, Seongmoon Wang, Srimat T. Chakradhar, Sudhakar M. Reddy |
| 2005 | A High Accuracy Bandgap Reference with Chopped Modulator to Compensate MOSFET Mismatch. | Lianxi Liu, Yintang Yang, Zhangming Zhu |
| 2005 | Energy-Efficient Compressed Address Transmission. | Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra |
| 2005 | The High Walls have Crumpled. | C. L. Liu |