| 2005 | Fully Integrated CMOS Frequency Synthesizer for ZigBee Applications. | Saurabh Kumar Singh, T. K. Bhattacharyya, Ashudeb Dutta |
| 2005 | Reducing Leakage with Mixed-V_th (MVT). | Frank Sill, Frank Grassert, Dirk Timmermann |
| 2005 | Cellular Automata Based Test Structures with Logic Folding. | Biplab K. Sikdar, Sukanta Das, Samir Roy, Niloy Ganguly, Debesh K. Das |
| 2005 | Crosstalk Noise Analysis at Multiple Frequencies. | Sachin Shrivastava, Sreeram Chandrasekar |
| 2005 | Extracting Exact Finite State Machines from Behavioral SystemC Descriptions. | Vikram Singh Saun, Preeti Ranjan Panda |
| 2005 | Projection Based Fast Passive Compact Macromodeling of High-Speed VLSI Circuits and Interconnects. | Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla |
| 2005 | High-Speed Interconnect Technology: On-Chip and Off-Chip. | Sachin S. Sapatnekar, Jaijeet S. Roychowdhury, Ramesh Harjani |
| 2005 | A High-Efficiency, Dual-Mode, Dynamic, Buck-Boost Power Supply IC for Portable Applications. | Biranchinath Sahu, Gabriel A. Rincn-Mora |
| 2005 | Exact Analytical Equations for Predicting Nonlinear Phase Errors and Jitter in Ring Oscillators. | Jaijeet S. Roychowdhury |
| 2005 | An Operational Amplifier Model for Test Planning at Behavioral Level. | Eduardo Romero, Gabriela Peretti, Carlos A. Marqus |
| 2005 | Moore's Law is Unconstitutional. | Walden C. Rhines |
| 2005 | An Accurate Probalistic Model for Error Detection. | Thara Rejimon, Sanjukta Bhanja |
| 2005 | Detecting SEU-Caused Routing Errors in SRAM-Based FPGAs. | E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashiknth, V. Kamakoti, Narayanan Vijaykrishnan |
| 2005 | A Framework for Distributed and Hierarchical Design-for-Test. | C. P. Ravikumar, R. Dandamudi, V. R. Devanathan, N. Haldar, K. Kiran, P. S. Vijay Kumar |
| 2005 | Battery Model for Embedded Systems. | Venkat Rao, Gaurav Singhal, Anshul Kumar, Nicolas Navet |
| 2005 | A Technique for Throughput and Register Optimization during Resource Constrained Pipelined Scheduling. | Nagendran Rangan, Karam S. Chatha |
| 2005 | Variable Input Delay CMOS Logic for Low Power Design. | Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bushnell |
| 2005 | DFM: Linking Design and Manufacturing. | Srinivas Raghvendra, Philippe Hurat |
| 2005 | A Novel Approach to Minimizing Reconfiguration Cost for LUT-Based FPGAs. | Krishna Prasad Raghuraman, Haibo Wang, Spyros Tragoudas |
| 2005 | A Principal Component Neural Network-Based Face Recognition System and Its ASIC Implementation. | Chakka Siva Sai Prasanna, N. Sudha, V. Kamakoti |
| 2005 | Design, Fabrication, Testing and Simulation of Porous Silicon Based Smart MEMS Pressure Sensor. | Chirasree Pramanik, Tarikul Islam, Hiranmay Saha, Joydeep Bhattacharya, S. Banerjee, Sagnik Dey |
| 2005 | Recent Advances in Verification, Equivalence Checking and SAT-Solvers. | Dhiraj K. Pradhan, Magdy S. Abadir, Mauricio Varea |
| 2005 | Tuple Detection for Path Delay Faults: A Method for Improving Test Set Quality. | Irith Pomeranz, Sudhakar M. Reddy |
| 2005 | SCINDY: Logic Crosstalk Delay Fault Simulation in Sequential Circuits. | Marong Phadoongsidhi, Kewal K. Saluja |
| 2005 | Exploiting Radio Hierarchies for Power-Efficient Wireless Device Discovery and Connection Setup. | Trevor Pering, Vijay Raghunathan, Roy Want |