| 2005 | Synthesis of Asynchronous Circuits Using Early Data Validity. | Nitin Gupta, Doug A. Edwards |
| 2005 | Multiple Fault Testing of Logic Resources of SRAM-Based FPGAs. | Saurabh Goyal, Mihir R. Choudhury, S. S. S. P. Rao, L. Kalyan Kumar |
| 2005 | An Ultra-Fast, On-Chip BiST for RF Low Noise Amplifiers. | Anand Gopalan, Tejasvi Das, Clyde Washburn, P. R. Mukund |
| 2005 | Variable Resizing for Area Improvement in Behavioral Synthesis. | R. Gopalakrishnan, Rajat Moona |
| 2005 | Gate Leakage and Its Reduction in Deep Submicron SRAM. | Ankur Goel, Baquer Mazhari |
| 2005 | An Effective VHDL-AMS Simulation Algorithm with Event Partitioning. | Hamid Reza Ghasemi, Zainalabedin Navabi |
| 2005 | Dual-Edge Triggered Static Pulsed Flip-Flops. | Aliakbar Ghadiri, Hamid Mahmoodi-Meimand |
| 2005 | Lithography Driven Layout Design. | Manish Garg, Laurent Le Cam, Matthieu Gonzalez |
| 2005 | Dynamically Exploiting Frequent Operand Values for Energy Efficiency in Integer Functional Units. | Kaushal R. Gandhi, Nihar R. Mahapatra |
| 2005 | Configurable Processor the Building Block for SOC (System-On-a-Chip). | Beatrice Fu |
| 2005 | Orthogonal Circuit Visualization Improved by Merging the Placement and Routing Phases. | Thomas Eschbach, Wolfgang Gnther, Bernd Becker |
| 2005 | A New CMOS Current Conveyors Based Translinear Loop for Log-Domain Circuit Design. | Debashis Dutta, Wouter A. Serdijn, Swapna Banerjee, Sriram Gupta |
| 2005 | Applicability of General Purpose Processors to Network Applications. | Murthy Durbhakula |
| 2005 | Level-Shifter Free Design of Low Power Dual Supply Voltage CMOS Circuits Using Dual Threshold Voltages. | Abdulkadir Utku Diril, Yuvraj Singh Dhillon, Abhijit Chatterjee, Adit D. Singh |
| 2005 | An Active Learning Scheme Using Support Vector Machines for Analog Circuit Feasibility Classification. | Mengmeng Ding, Ranga Vemuri |
| 2005 | Power Variability and Its Impact on Design. | Anirudh Devgan, Sani R. Nassif |
| 2005 | Performances of Coupled Interconnect Lines: The Impact of Inductance and Routing Orientation. | Denis Deschacht, Alain Lopez |
| 2005 | A Methodology for Fast Vector Based Power Supply and Substrate Noise Analyses. | Sankar P. Debnath, Sukumar Jairam, H. Udayakumar |
| 2005 | Using Contrapositive Law in an Implication Graph to Identify Logic Redundancies. | Kunal K. Dave, Vishwani D. Agrawal, Michael L. Bushnell |
| 2005 | Effects of Technology and Dimensional Scaling on Input Loss Prediction of RF MOSFETs. | Tejasvi Das, Clyde Washburn, P. R. Mukund, Steve Howard, Ken Paradis, Jung-Geau Jang, Jan Kolnik, Jeff Burleson |
| 2005 | A Verification System for Transient Response of Analog Circuits Using Model Checking. | Tathagato Rai Dastidar, P. P. Chakrabarti |
| 2005 | Dictionary Based Code Compression for Variable Length Instruction Encodings. | Dipankar Das, Rajeev Kumar, P. P. Chakrabarti |
| 2005 | Revisiting VLSI Interconnects in Deep Sub-Micron: Some Open Questions. | Parthasarathi Dasgupta |
| 2005 | Formal Methods for Analyzing the Completeness of an Assertion Suite against a High-Level Fault Model. | Sayantan Das, Ansuman Banerjee, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix |
| 2005 | ASIC Design of the Linearisation Circuit of a PTC Thermistor. | Shubhajit Roy Chowdhury, C. Pramanik, Hiranmay Saha |