| 2004 | On Interconnecting Circuits with Multiple Scan Chains for Improved Test Data Compression. | Irith Pomeranz, Sudhakar M. Reddy |
| 2004 | Static Timing Analysis of Irreversible Crosstalk Noise Pulse Faults. | Marong Phadoongsidhi, Kewal K. Saluja |
| 2004 | On Design and Implementation of an Embedded Automatic Speech Recognition System. | Sujay Phadke, Rhishikesh Limaye, Siddharth Verma, Kavitha Subramanian |
| 2004 | An Efficient Method to Generate Test Vectors for Combinational Cell Verification. | Nirav Patel, M. Srihari, Pooja Maheswari, G. N. Nandakumar |
| 2004 | Evaluating the Reliability of Defect-Tolerant Architectures for Nanotechnology with Probabilistic Model Checking. | Gethin Norman, David Parker, Marta Z. Kwiatkowska, Sandeep K. Shukla |
| 2004 | Chip Package Co-Design of a Heterogeneously Integrated 2.45GHz CMOS VCO using Embedded Passives in a Silicon Package. | Ghanshyam Nayak, P. R. Mukund |
| 2004 | Design Challenges in Sub-100nm High Performance Microprocessors. | Siva G. Narendra, Vasantha Erraguntla, James W. Tschanz, Nitin Borkar |
| 2004 | The Influence of Process Variations on the Halo MOSFETs and its Implications on the Analog Circuit performance. | K. Narasimhulu, Siva G. Narendra, V. Ramgopal Rao |
| 2004 | A New Approach To Topology Selection For Cell-Level Analog Circuits. | S. Nagar, Baquer Mazhari |
| 2004 | Interconnect Modeling for Copper/Low-k Technologies. | N. S. Nagaraj, Tom Bonifield, Abha Singh, Roger Griesmer, Poras T. Balsara |
| 2004 | Preventing Crosstalk Delay using Fibonacci Representation. | Madhu Mutyam |
| 2004 | Game Theoretic Modeling of Voltage and Frequency Scaling during Behavioral Synthesis. | Ashok K. Murugavel, N. Ranganathan |
| 2004 | Gate Sizing and Buffer Insertion using Economic Models for Power Optimization. | Ashok K. Murugavel, N. Ranganathan |
| 2004 | Net Buffering in the Presence of Multiple Timing Views. | Rajeev Murgai |
| 2004 | Katha-Mala: A Voice Output Communication Aid for the Children with Severe Speech and Multiple Disorders (SSMI). | Arijit Mukhopadhyay, Saptarshi Biswas, Pratik Worah, Ramasish Das, Susmit Biswas, Anupam Basu |
| 2004 | Design for Verification with SystemVerilog. | Phil Moorby |
| 2004 | A System Approach to Energy Management. | Dennis M. Monticelli |
| 2004 | VLSI Implementation of Visible Watermarking for a Secure Digital Still Camera Design. | Saraju P. Mohanty, Nagarajan Ranganathan, Ravi Namballa |
| 2004 | ILP Models for Energy and Transient Power Minimization During Behavioral Synthesis. | Saraju P. Mohanty, Nagarajan Ranganathan, Sunil K. Chappidi |
| 2004 | Boolean Decomposition Using Two-literal Divisors. | Nilesh Modi, Jordi Cortadella |
| 2004 | A Distributed and Pipelined Controller for a Modular and Scalable Hardware Emulator. | Aditya Mittal, Madhav P. Desai |
| 2004 | Design of Amplifier with Rail-to-Rail CMR with 1V Power Supply. | Srinjoy Mitra, A. N. Chandorkar |
| 2004 | Synthesis-driven Exploration of Pipelined Embedded Processors. | Prabhat Mishra, Arun Kejariwal, Nikil D. Dutt |
| 2004 | On-chip testing of embedded transducers. | Salvador Mir, Libor Rufer, Bernard Courtois |
| 2004 | Partial Tag Comparison: A New Technology for Power-Efficient Set-Associative Cache Designs. | Rui Min, Zhiyong Xu, Yiming Hu, Wen-Ben Jone |