| 2004 | The Nostrum Backbone - a Communication Protocol Stack for Networks on Chip. | Mikael Millberg, Erland Nilsson, Rikard Thid, Shashi Kumar, Axel Jantsch |
| 2004 | Evaluation of pausible clocking for interfacing high speed IP cores in GALS Framework. | Joycee Mekie, Supratik Chakraborty, Dinesh K. Sharma |
| 2004 | Automated Architectural Optimization of Digital FIR Filters. | Ronald W. Mehler, Dian Zhou |
| 2004 | Challenges in the Design of Embedded Real-time DSP SoCs. | Mahesh Mehendale |
| 2004 | An Area-Efficient Router for the Data-Intensive Architecture (DIVA) System. | Sumit D. Mediratta, Jeff Sondeen, Jeffrey T. Draper |
| 2004 | Advanced LCD Timing Controller IC with Memory-Assisted Response Time Compensation. | Richard McCartney, Nikhil Balram |
| 2004 | Energy-aware Logic Synthesis and Technology Mapping for MUX-based FPGAs. | Maitrali Marik, Ajit Pal |
| 2004 | Application of Wavelets and Generalized Pencil-Of-Function Method for the Extraction of Noise Current Spectrum and Simulation of Simultaneous Switching Noise. | Rohan Mandrekar, Madhavan Swaminathan, Sungjun Chun |
| 2004 | A Narrow Pulse- Suppressing Filter For Input Buffer. | Pradip Mandal |
| 2004 | Analog VLSI Architecture for Discrete Cosine Transform using Dynamic Switched Capacitors. | Ashis Kumar Mal, Anindya Sundar Dhar |
| 2004 | A Low Voltage, Low Noise CMOS RF Receiver Front-End. | Jie Long, Robert J. Weber |
| 2004 | Design and Implementation of a Parallel Verilog Simulator: PVSim. | Tun Li, Yang Guo, Sikun Li |
| 2004 | An Architecture for Motion Estimation in the Transform Domain. | Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf |
| 2004 | A New Surface Accumulation Layer Transistor(SALTran) Concept for Current Gain Enhancement in Bipolar Transistors. | Mamidala Jagadesh Kumar, Vinod Parihar |
| 2004 | Low Energy Switch Block For FPGAs. | Rohini Krishnan, Jos Pineda de Gyvez |
| 2004 | Towards The Complete Elimination of Gate/Switch Level Simulations. | Narayanan Krishnamurthy, Jayanta Bhadra, Magdy S. Abadir, Jacob A. Abraham |
| 2004 | Fast, Layout-Aware Validation of Test-Vectors for Nanometer-Related Timing Failures. | Aman Kokrady, C. P. Ravikumar |
| 2004 | A tunable gm-C filter with low variation across Process, Voltage and Temperature. | Qadeer Ahmad Khan, Sanjay Kumar Wadhwa, Kulbhushan Misri |
| 2004 | Estimating Pre-Placement FPGA Interconnection Requirements. | PariVallal Kannan, Dinesh Bhatia |
| 2004 | A Novel Technique For Steady State Analysis For VLSI Circuits In Partially Depleted SOI. | Rajiv V. Joshi, K. Kroell, Ching-Te Chuang |
| 2004 | Carry Circuitry for LUT-Based FPGA. | Varun Jindal, Alpana Agarwal |
| 2004 | High Speed Integrated A to D Converters. | Paul L. Jespers |
| 2004 | A Quasi Static Model for a Simply Supported Beam in a Circuit Simulation Framework. | Sukumar Jairam, C. Venkatesh, Navakanta Bhat, Shyam Singh, Rudra Pratap |
| 2004 | CMOS Scaling for sub-90 nm to sub-10 nm. | Hiroshi Iwai |
| 2004 | On-chip networks: A scalable, communication-centric embedded system design paradigm. | Jrg Henkel, Wayne H. Wolf, Srimat T. Chakradhar |