| 2004 | Enhancing SAT-based Bounded Model Checking using Sequential Logic Implications. | Rajat Arora, Michael S. Hsiao |
| 2004 | Maximum Multiplicity Distributions for Length Prediction Driven Placement. | Pranav Anbalagan, Jeffrey A. Davis |
| 2004 | Ant Colony Optimization Technique for Macrocell Overlap Removal. | Stelian Alupoaei, Srinivas Katkoori |
| 2004 | Energy Model Based Macrocell Placement for Wirelength Minimization. | Stelian Alupoaei, Srinivas Katkoori |
| 2004 | A 800 MHz System-on-Chip for Wireless Infrastructure Applications. | Sanjive Agarwala, Paul Wiley, Arjun Rajagopal, Anthony M. Hill, Raguram Damodaran, Lewis Nardini, Tim Anderson, Steven Mullinnix, Jose Flores, Heping Yue, Abhijeet Chachad, John Apostol, Kyle Castille, Usha Narasimha, Tod Wolf, N. S. Nagaraj, Manjeri Krishnan, Luong Nguyen, Todd Kroeger, Mike Gill, Peter Groves, Bill Webster, Joel Graber, Christine Karlovich |
| 2004 | Cycle-Accurate Energy Model and Source-Independent Characterization Methodology for Embedded Processors. | Syed Saif Abrar |
| 2003 | Bridging Fault Detections for Testable Realizations of Logic Functions. | Zhongliang Pan |
| 2003 | Mapping and Scheduling for Architecture Exploration of Networking SoCs. | Thomas Wild, Jrgen Foag, Nuria Pazos, Winthir Brunnbauer |
| 2003 | High-level Synthesis of Multi-process Behavioral Descriptions. | Weidong Wang, Niraj K. Jha, Anand Raghunathan, Sujit Dey |
| 2003 | Living at the Edge. | Ted Vucurevich |
| 2003 | Processing and Scheduling Components in an Innovative Network Processor Architecture. | Kyriakos Vlachos, Nikos A. Nikolaou, Theofanis Orphanoudakis, Stylianos Perissakis, Dionisios N. Pnevmatikatos, George Kornaros, J. A. Sanchez, George E. Konstantoulakis |
| 2003 | GALLOP: Genetic Algorithm based Low Power FSM Synthesis by Simultaneous Partitioning and State Assignment. | Ganesh Venkataraman, Sudhakar M. Reddy, Irith Pomeranz |
| 2003 | Advances in VLSI Design and Product Development Challenges. | A. Vasudevan |
| 2003 | Task Graph Extraction for Embedded System Synthesis. | Keith S. Vallerio, Niraj K. Jha |
| 2003 | A Low Power-Delay Product Page-Based Address Bus Coding Method. | Chi-Ming Tsai, Guang-Wan Liao, Rung-Bin Lin |
| 2003 | Effect of Scaling on the Non-quasi-static Behaviour of the MOSFET for RF IC's. | R. Srinivasan, Navakanta Bhat |
| 2003 | Extending Platform-Based Design to Network on Chip Systems. | Juha-Pekka Soininen, Axel Jantsch, Martti Forsell, Antti Pelkonen, Jari Kreku, Shashi Kumar |
| 2003 | SoC Synthesis with Automatic Hardware Software Interface Generation. | Amarjeet Singh, Amit Chhabra, Anup Gangwar, Basant Kumar Dwivedi, M. Balakrishnan, Anshul Kumar |
| 2003 | High Level Modeling and Validation Methodologies for Embedded Systems: Bridging the Productivity Gap. | Sandeep K. Shukla, Jean-Pierre Talpin, Stephen A. Edwards, Rajesh K. Gupta |
| 2003 | A Pipeline Architecture for Encompression (Encryption + Compression) Technology. | Chandrama Shaw, Debashis Chatterji, Pradipta Maji, Subhayan Sen, B. N. Roy, Parimal Pal Chaudhuri |
| 2003 | Cryptosystem Designed for Embedded System Security. | Subhayan Sen, Sk. Iqbal Hossain, Kabirul Islam, Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri |
| 2003 | Development of 2.4 GHz RF Transceiver Front-end Chipset in 0.25m CMOS. | Saikat Sarkar, Padmanava Sen, Arvind Raghava, Sudipto Chakarborty, Joy Laskar |
| 2003 | Synthesis of Dual-VT Dynamic CMOS Circuits. | Debasis Samanta, Ajit Pal |
| 2003 | Immediate Neighbor Difference IDDQ Test (INDIT) for Outlier Identification. | Sagar S. Sabade, D. M. H. Walker |
| 2003 | Formal Verification Using Bounded Model Checking: SAT versus Sequential ATPG Engines. | Daniel G. Saab, Jacob A. Abraham, Vivekananda M. Vedula |