| 2003 | Energy Efficient Scheduling for Datapath Synthesis. | Saraju P. Mohanty, N. Ranganathan |
| 2003 | Electrical Model For Program Disturb Faults in Non-Volatile Memories. | Mohammad Gh. Mohammad, Kewal K. Saluja |
| 2003 | Optimization of 1.8V I/O circuits for performance, reliability at the 100nm technology node. | Vinod Menezes, C. B. Keshav, Sushil Gupta, M. Roopashree, S. Krishnan, A. Amerasekera, G. Palau |
| 2003 | A Fault-Independent Transitive Closure Algorithm for Redundancy Identification. | Vishal J. Mehta, Kunal K. Dave, Vishwani D. Agrawal, Michael L. Bushnell |
| 2003 | Graph Transformations for Improved Tree Height Reduction. | G. N. Mangalam, Sanjiv Narayan, Paul van Besouw, LaNae J. Avra, Anmol Mathur, Sanjeev Saluja |
| 2003 | A Methodology for Accurate Modeling of Energy Dissipation in Array Structures. | Mahesh Mamidipaka, Nikil D. Dutt, Kamal S. Khouri |
| 2003 | Substrate Bias Effect on Cycling Induced Performance Degradation of Flash EEPROMs. | S. Mahapatra, S. Shukuri, Jeff Bude |
| 2003 | India-Building the Tall, Thin VLSI Engineer. | Rajeev Madhavan |
| 2003 | Power-profile Driven Variable Voltage Sealing for Heterogeneous Distributed Real-time Embedded Systems. | Jiong Luo, Niraj K. Jha |
| 2003 | A New Lateral SiGe-Base PNM Schottky Collector Bipolar Transistor on SOI for Non-saturating VLSI Logic Design. | Mamidala Jagadesh Kumar, D. Venkateshrao |
| 2003 | A Low-Voltage Low Power CMOS Companding Filter. | J. Veerendra Kumar, K. Radhakrishna Rao |
| 2003 | Application of Look-up Table Approach to High-K Gate Dielectric MOS Transistor circuits. | D. Vinay Kumar, Nihar R. Mohapatra, Mahesh B. Patil, V. Ramgopal Rao |
| 2003 | Optimal Code and Data Layout in Embedded Systems. | T. S. Rajesh Kumar, R. Govindarajan, C. P. Ravikumar |
| 2003 | An Adaptive Supply-Voltage Scheme for Low Power Self-Timed CMOS Digital Design. | W. Kuang, J. S. Yuan |
| 2003 | Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks. | Rohini Krishnan, Om Prakash Gangwal, Jos T. J. van Eijndhoven, Anshul Kumar |
| 2003 | Effects of Multi-cycle Sensitization on Delay Tests. | Arun Krishnamachary, Jacob A. Abraham |
| 2003 | Multiple Trigonometric Approximation of Sine-Amplitude with Small ROM Size for Direct Digital Frequency Synthesizers. | Yong Sin Kim, Soo Hwan Kim, Kwang-Hyun Baek, Suki Kim, Sung-Mo Kang |
| 2003 | A Low Voltage Switched-Capacitor Current Reference Circuit with low dependence on Process, Voltage and Temperature. | Qadeer Ahmad Khan, Sanjay Kumar Wadhwa, Kulbhushan Misri |
| 2003 | Design of Deep Sub-Micron CMOS Circuits. | Rajiv V. Joshi, Kaushik Roy |
| 2003 | A Run-time Reconfiguration Algorithm for VLSI Arrays. | Wu Jigang, Thambipillai Srikanthan |
| 2003 | ESD Reliability Challenges for RF/Mixed Signal Design & Processing. | Natarajan Mahadeva Iyer, M. K. Radhakrishnan |
| 2003 | Channel Width Test Data Compression under a Limited Number of Test Inputs and Outputs. | Hideyuki Ichihara, Kozo Kinoshita, Koji Isodono, Shigeki Nishikawa |
| 2003 | Synthesis of Real-Time Embedded Software by Timed Quasi-Static Scheduling. | Pao-Ann Hsiung, Feng-Shi Su |
| 2003 | Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems. | Pao-Ann Hsiung, Shu-Yu Cheng |
| 2003 | A Fast Macro Based Compilation Methodology for Partially Reconfigurable FPGA Designs. | Manish Handa, Rajesh Radhakrishnan, Madhubanti Mukherjee, Ranga Vemuri |